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    AMPLIFIER WITH HIGH POWER SUPPLY NOISE REJECTION
    1.
    发明公开
    AMPLIFIER WITH HIGH POWER SUPPLY NOISE REJECTION 有权
    高功率电源噪声减小放大器

    公开(公告)号：EP2727240A1

    公开(公告)日：2014-05-07

    申请号：EP12735407.4

    申请日：2012-06-29

    Applicant: Qualcomm Incorporated

    Inventor： DHANASEKARAN, Vijayakumar

    IPC: H03F1/30

    CPC classification number: H03F1/30

    Abstract: An amplifier with high power supply rejection is disclosed. In an exemplary implementation, an amplifier includes a first stage configured to receive a signal to be amplified, a second stage comprising an input transistor coupled to the first stage, and further comprising at least one additional transistor, and a voltage regulator configured to received a first supply voltage and generate a regulated supply voltage, the first supply voltage coupled to the at least one additional transistor, the regulated supply voltage coupled to the first stage and the input transistor of the second stage to improve power supply noise rejection of the apparatus.

    AMPLIFIER BIAS TECHNIQUES
    4.
    发明公开
    AMPLIFIER BIAS TECHNIQUES 有权
    闭路设置一个放大器

    公开(公告)号：EP2489122A2

    公开(公告)日：2012-08-22

    申请号：EP10771289.5

    申请日：2010-10-15

    Applicant: Qualcomm Incorporated

    Inventor： DHANASEKARAN, Vijayakumar

    IPC: H03F1/30

    CPC classification number: H03F1/308 ,  H03F3/3027 ,  H03F2200/447

    Abstract: Techniques for generating a bias voltage for a class AB amplifier having first and second active transistors. In an exemplary embodiment, a diode-coupled first transistor supports a first current, and the gate voltage of the first transistor is coupled to the gate voltage of the first active transistor. The first current is split into a second current and a first auxiliary current supported by a second transistor, which is biased at a desired common-mode output voltage of the class AB amplifier. The first auxiliary current is further combined with a third current to be supported by a third transistor, with the third transistor configured to replicate the characteristic of the second active transistor. Further techniques are provided for setting the drain voltage of the third transistor to be close to the common-mode output voltage. The techniques described herein may be used to provide a bias voltage for the NMOS and/or PMOS active transistors in a class AB amplifier.

    SINGLE INDUCTOR MULTIPLE OUPUT (SIMO) DC-DC CONVERTER
    6.
    发明公开
    SINGLE INDUCTOR MULTIPLE OUPUT (SIMO) DC-DC CONVERTER 有权

    公开(公告)号：EP3338349A1

    公开(公告)日：2018-06-27

    申请号：EP16747936.9

    申请日：2016-07-18

    Applicant: Qualcomm Incorporated

    Inventor： DHANASEKARAN, Vijayakumar

    IPC: H02M1/00 ,  H02M3/156 ,  H02M3/335

    CPC classification number: H02M3/158 ,  H02M3/156 ,  H02M3/335 ,  H02M3/33561 ,  H02M2001/0003 ,  H02M2001/009

    Abstract: A method and an apparatus for DC-to-DC conversion are provided. The apparatus is a DC-to-DC converter including a first feedback current control circuit coupled to a first voltage output of the DC-to-DC converter. The first feedback current control circuit is configured to generate a first control current based on a voltage difference between a first reference voltage and the first voltage output of the DC-to-DC converter. The apparatus further includes a constant charge comparator coupled to the first feedback current control circuit and configured to compare an integrated error signal to a threshold to generate a comparison result, the integrated error signal comprising an integration of a first error signal over time, the first error signal based on the first control current.

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