公开(公告)号：EP0859978A1

公开(公告)日：1998-08-26

申请号：EP96938827.0

申请日：1996-11-08

申请人： Chromatic Research, Inc.

发明人： GULSEN, Denis

IPC分类号： G06F9

CPC分类号： G06F9/4812 ,  G06F9/462

摘要： A system and method for fast context switching between tasks by tracking task utilization of shared system resources and optimizing swapping the shared system resources to backing store by computing the difference between the current task's utilization of the system resources and the incoming task's utilization of the shared system resources and only swapping to backing store the difference between the current task's utilization, the available system resources, and the incoming task's needs.

公开(公告)号：EP0819284A2

公开(公告)日：1998-01-21

申请号：EP96912470.0

申请日：1996-04-03

申请人： Chromatic Research, Inc.

发明人： FARMWALD, P., Michael ,  PURCELL, Stephen, C. ,  HUNG, Andrew, C. ,  FOGG, Chad, E.

IPC分类号： H04N7 ,  G06T7

CPC分类号： G06T7/231 ,  G06T2207/10016

摘要： A method of approximating the pixel intensity values of a current block using the pixel intensity values of a search window, wherein the precision of the number of bits used to represent the pixel intensity values is reduced. The pixel intensity values of the pixels in the current block are averaged to determine a first average pixel intensity value. The pixel intensity values of the current block which have a pixel intensity value less than the first average pixel intensity value are averaged to determine a second average pixel intensity value. The pixel intensity values of the current block which have a pixel intensity value greater than the first average pixel intensity value are averaged to determine a third average pixel intensity value. The first, second and third average pixel intensity values are used to determine thresholded pixel intensity values for the current block pixels and the search window pixels, thereby creating a thresholded current block and a thresholded search window. The thresholded current block and thresholded search blocks within the thresholded search window are compared to determine the optimal thresholded search blocks which most closely approximate the thresholded current block. The non-thresholded search blocks corresponding to the optimal thresholded search blocks are compared with the current block (non-thresholded). The non-thresholded search block which most closely approximates the current block is used to estimate the current block.

公开(公告)号：EP0697649A2

公开(公告)日：1996-02-21

申请号：EP95111691.2

申请日：1995-07-25

申请人： Chromatic Research, Inc.

发明人： Purcell, Stephen C.

IPC分类号： G06F5/01 ,  G06F7/00

CPC分类号： G06F7/762

摘要： A shifter circuit and method for simultaneously and independently shifting and reordering a plurality of data bytes. The shifter circuit includes first and second registers which each receive a plurality of data bytes. The first register is coupled to a plurality of first buses, with each of the first buses receiving a data byte from the first register. Similarly, the second register is coupled to a plurality of second buses, with each of the second buses receiving a data byte from the second register. A multiplicity of third buses are coupled to the first and second buses. A byte shifting multiplexer is coupled to each of the third buses. A plurality of bit shifting multiplexer are coupled to the byte shifting multiplexers, with each bit shifting multiplexer being coupled to a pair of byte shifting multiplexers. A control circuit is coupled to the byte shifting and bit shifting multiplexers. The control circuit provides for independent control of each of the byte shifting multiplexers. The control circuit also provides for independent control of each of the bit shifting multiplexers.

公开(公告)号：EP0906610A1

公开(公告)日：1999-04-07

申请号：EP96941317.0

申请日：1996-11-08

申请人： Chromatic Research, Inc.

发明人： WANG, Avery, L.

IPC分类号： G10H1 ,  G10H7

CPC分类号： G10H7/02 ,  G10H1/16 ,  G10H7/12 ,  G10H2250/205 ,  G10H2250/561 ,  Y10S84/10

摘要： A method and apparatus for producing a tone (e.g. for music) without the use of a waveform memory and using a feedback loop. The feedback loop includes a waveform generator which calculates, in real time, a parabolic approximation to a sine wave. The feedback loop includes a delay phase differencer (46) to eliminate hunting. The output waveform from the feedback loop is provided to a sine function generator (74) which approximates a sine value using a third order polynomial, to provide the output tone.

公开(公告)号：EP0697649A3

公开(公告)日：1996-05-01

申请号：EP95111691.2

申请日：1995-07-25

申请人： Chromatic Research, Inc.

发明人： Purcell, Stephen C.

IPC分类号： G06F5/01 ,  G06F7/00

CPC分类号： G06F7/762

摘要： A shifter circuit and method for simultaneously and independently shifting and reordering a plurality of data bytes. The shifter circuit includes first and second registers which each receive a plurality of data bytes. The first register is coupled to a plurality of first buses, with each of the first buses receiving a data byte from the first register. Similarly, the second register is coupled to a plurality of second buses, with each of the second buses receiving a data byte from the second register. A multiplicity of third buses are coupled to the first and second buses. A byte shifting multiplexer is coupled to each of the third buses. A plurality of bit shifting multiplexer are coupled to the byte shifting multiplexers, with each bit shifting multiplexer being coupled to a pair of byte shifting multiplexers. A control circuit is coupled to the byte shifting and bit shifting multiplexers. The control circuit provides for independent control of each of the byte shifting multiplexers. The control circuit also provides for independent control of each of the bit shifting multiplexers.

公开(公告)号：EP0870225A1

公开(公告)日：1998-10-14

申请号：EP96936118.0

申请日：1996-10-09

申请人： Chromatic Research, Inc.

发明人： PURCELL, Stephen, C.

IPC分类号： G06F7

CPC分类号： G06F7/5324 ,  G06F7/49994 ,  G06F7/5338 ,  G06F2207/3828

摘要： A signed multiplier circuit (200) performs selectable multiplication operations on a first word having an upper byte and a lower byte and a second word having an upper byte and a lower byte. A first multiplier means (231, 232) generates a first product representative of the product of the upper bytes of the first and second words plus the product of the lower bytes of the first and second words. A second multiplier means (230, 233) generates a second product representative of the product of the upper byte of the first word and the lower byte of the second word plus the product of the lower byte of the first word and the upper byte of the second word. The second multiplier means (230, 233) can be selectively disabled. When the second multiplier means (230, 233) is enabled, the multiplier circuit (200) multiplies the first and second words. When the second multiplier means (230, 233) is disabled, the multiplier circuit (200) multiplies the upper bytes of the first and second words and the lower bytes of the first and second words.