SEMICONDUCTOR MEMORY AND ITS TESTING METHOD

    公开(公告)号:JPH03212900A

    公开(公告)日:1991-09-18

    申请号:JP759990

    申请日:1990-01-16

    Inventor: YASUDA KENICHI

    Abstract: PURPOSE:To decide the address of a defective memory cell by storing normal/ defective data in a register at every decision of the normal/defective condition of a memory cell, and making access the register. CONSTITUTION:Plural bit lines 1,... are intersected orthogonally to plural word lines 2,..., and plural memory cells 3,... connecting the bit lines 1 and the word lines 2 are provided at each of those crossing points. The bit lines 1,... are connected selectively to one input side of comparators 6,... and inversion circuit selection switch S3 sides by the switching operations of comparator selection switches S1,... The comparators 6,... compare data read out of the memory cells 3,... with prescribed data, and write comparison results or the data in the memory cell on the registers 10,... In such a way, it is possible to specify the register on which write is performed by making access the registers sequentially, and to detect the address of a normal memory cell.

    METHOD OF STABILIZING LASER WAVELENGTH

    公开(公告)号:JPH01184891A

    公开(公告)日:1989-07-24

    申请号:JP612888

    申请日:1988-01-13

    Abstract: PURPOSE:To stabilize a wavelength and to decrease variation in laser output, by utilizing two etalons so that one is controlled from a result of spectral diffraction of a laser beam while the other is controlled from laser power. CONSTITUTION:A divergent component produced from a laser beam by an integrator 12 is spectrally diffracted by an etalon 13 and one-dimensional distribution of optical intensity is measured by an image pickup element. 15. The measured data is smoothened and subjected to image processing 16 to obtain a position (x) presenting a maximum intensity. The position (x) is compared with a designated positional coordinate (x0) corresponding to an indicated wavelength, and a fine control etalon 5 is controlled by means of a servo mechanism from a result of the comparison, so that the central wavelength lambdam2 in a transmitting region of the etalon is varied. The fine control etalon is regulated in this manner, whereby an oscillation wavelength of the laser can be held fixedly. A part of the laser beam 6 is guided to a power monitoring mechanism 9. It is determined whether a laser output is increased or decreased when a rough control etalon 4 is controlled in either direction. The rough control etalon 4 is regulated by the servo mechanism 11 so that a maximum laser output can be obtained.

    MULTIPORT MEMORY CONTROLLER
    14.
    发明专利

    公开(公告)号:JPS63261451A

    公开(公告)日:1988-10-28

    申请号:JP9525987

    申请日:1987-04-20

    Inventor: YASUDA KENICHI

    Abstract: PURPOSE:To continuously access a memory when a request for using another CPU is not outputted after once accessing the memory from one CPU by providing the titled controller with a prescribed timing generating circuit and a memory use request detecting circuit. CONSTITUTION:The timing generating circuit 12 generates timing signals 21-24 for sequentially testing the existence of a memory use request from the CPU and applies the signals 21-24 to a latch circuit 10. On the other hand, the memory use request detecting circuit 17 checks a using request from the other CPU when one CPU completes the access of the memory, detects the using request from the other CPU and applies a detecting signal to the latch circuit 10. If using request signals 5b-5d from the other CPU are not generated, the CPU connected to a use acknowledge signal 6a can be allowed to access the memory continuously without queuing while turning on/off a using request signal.

    ADDRESS MARK DETECTION CIRCUIT FOR DISK DEVICE

    公开(公告)号:JPS63201954A

    公开(公告)日:1988-08-22

    申请号:JP3244187

    申请日:1987-02-17

    Inventor: YASUDA KENICHI

    Abstract: PURPOSE:To obtain a stable and highly accurate address mark detection circuit by combining a counter and a flip-flop circuit through the aid of using a clock signal, being used in a disk device. CONSTITUTION:The address mark part of a prescribed byte length to show the beginning of an address part in a format is detected by the combination of the counters 16, 17 and the flip-flop circuits 19, 20, through the aid of using the clock signal, for instance, a read clock signal or a reference clock signal or the like. Namely, when by counting-up the counter by the clock signal in the disk device, the address mark part of the specified byte length designated by the format is found during a period that an address mark search signal is in ON-state, an address mark detect signal is outputted. Thus, without using a resistor and a capacitor, the highly accurate and stable address mark detection circuit can be obtained by a logic circuit.

    SEMICONDUCTOR STORAGE DEVICE
    16.
    发明专利

    公开(公告)号:JPS62137795A

    公开(公告)日:1987-06-20

    申请号:JP27642685

    申请日:1985-12-09

    Abstract: PURPOSE:To enable a register to have data holding functions by itself and also to decrease the number of component transistors to attain a high degree of integration with a semiconductor storage device, by using a latch circuit combined with CMOS inverters to constitute a data register of a SAM part. CONSTITUTION:Data are already read out of a memory cell together with bit lines 1 and 2 set at H and L respectively. When a data transfer signal 7 is set at H, both transistors TRQ7 and Q8 are turned on. Thus the data are supplied to a data register 30. Here TRs Q11 and Q10 are turned on and TRs Q9 and Q12 are turned off respectively and therefore nodes N3 and N4 are set at H and L respectively. Then the data are fetched by the register 30. When a selection signal 9 sent from a selector is set at H, the data are outputted to a serial output bus. In such a way, the input data can be held by a latch circuit provided in the register 30. Furthermore, the number of transistors constituting the semiconductor storage device can be decreased and therefore a control signal is simplified.

    MEASURING DEVICE FOR CURRENT
    18.
    发明专利

    公开(公告)号:JPS57182178A

    公开(公告)日:1982-11-09

    申请号:JP6715481

    申请日:1981-04-30

    Inventor: YASUDA KENICHI

    Abstract: PURPOSE:To insulate a measuring part completely and enable highly precise measurement with ease, by transduing a current to be measured flowing through a current measuring shunt into an optical signal and transmitting the same to the measuring part through an optical fiber. CONSTITUTION:When a current I to be measured flows through a shunt 1, a current IL proportional to the current I flows through a light-emitting diode 2, which delivers an optical signal having the illuminance proportional to the current IL. This optical signal is transmitted to the light-receiving diode 6 of an optical signal receiving part B and transduced therein into a voltage signal proportional to the illuminance. Then, an amplifier 7 removes a voltage corresponding to a base current made to flow through the light-emitting diode 2 by supplying a bias voltage, and supplies a voltage signal proportional to the current to be measured to a measuring part 8. By this constitution, a current in a high- voltage part can be measured without being restricted by an insulation level and, in addition, the effect of noises can be eliminated.

    HUMIDITY ADJUSTER, AND OPERATION METHOD AND EVALUATION METHOD FOR THE HUMIDITY ADJUSTER

    公开(公告)号:JP2004008857A

    公开(公告)日:2004-01-15

    申请号:JP2002163235

    申请日:2002-06-04

    Abstract: PROBLEM TO BE SOLVED: To provide a humidity adjuster capable of reducing a heat generation amount and to provide an operation method for a humidity adjuster capable of reducing lowering of a dehumidication ability. SOLUTION: The humidity adjuster is provided with an anion conductive solid electrolyte membrane 9; a cathode catalyst layer 10 provided on a surface at one side of this solid electrolyte membrane 9 and comprising particulates of a metal of platinum group or a metal oxide of the platinum group; a first porous base material 11 provided to contact with this cathode catalyst layer 10; a second porous base material 13 provided on a surface at the other side of the solid electrolyte membrane 9; and an anode catalyst layer 14 provided at an atmosphere side of the solid electrolyte membrane 9 and the second porous base material 13 and comprising particulates of platinum group or a metal oxide of the platinum group. Further, a thin film 13a comprising a metal of the platinum group other than platinum or a metal oxide of the platinum group other than platinum is formed on a surface of the second porous base material 13. COPYRIGHT: (C)2004,JPO

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