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公开(公告)号：JPH04115727A
公开(公告)日：1992-04-16
申请号：JP23449390
申请日：1990-09-06
申请人： TOSHIBA CORP
发明人： HIRAI RENZOU
摘要： PURPOSE:To prevent distortion of a waveform of a signal received at a reception terminal of a transmission line by modifying a waveform at the rising and the falling of a pulse signal so as to cancel the waveform deformation caused in the transmission line by a waveform generating section. CONSTITUTION:A controller 9 changes over a switch 3 at a prescribed period to apply alternately a voltage E1 from a fixed power supply 1 and a voltage E2 from a variable power supply 2 to a tap of a primary coil 4a of a transformer 4 and controls switches 7,8 alternately to connect each terminal of a coil 4a to ground via resistors 5,6 at a prescribed period. Then a pulse signal having overshoot is induced positively and negatively into a secondary coil 4b and the DC component is cut off by a capacitor 10 and the result is sent to a transmission line 11 and fed to a load resistor 12. Since the pulse signal from the capacitor 10 has an overshoot, the waveform of the signal fed across a resistor 12 is made almost rectangular.
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公开(公告)号：JPH0498867A
公开(公告)日：1992-03-31
申请号：JP21667890
申请日：1990-08-17
IPC分类号： H01L21/822 , H01L21/82 , H01L21/8249 , H01L27/04 , H01L27/06 , H03K5/01 , H03K5/125
摘要： PURPOSE:To prevent a semiconductor integrated circuit from slowing down in current switching speed by a method wherein an accelerating circuit which is provided with at least either of a pull-up means which is operated just before a pair of voltage signals which represent data is inverted to pull up the potential of a pair of wirings laid around and an equalizing means which equalizes a pair of the wirings in potential is connected to the pair of wirings. CONSTITUTION:When data lines DIN and DIN are inverted in potential, currents flowing through transistors TrD and TrE are turned into I0 and 0 from 0 and I0 respectively. Before currents flowing through the transistors TrD and TrE are switched, pulses are generated in a control signal phi of pull-up transistors TrD and TrG. The pull-up transistor TrG is turned ON by the pulses to increase wirings D2 and D1 in potential, so that the wirings D1, D2, and D2 become fast in charging speed. Therefore, a current flowing through a transistor TrC is decreased quick in intensity, and an output voltage is quickly charged, so that the time to inverse the output voltage is shortened. By this setup, a current switching speed can be prevented from slow-down due to the increase of a wiring in length.
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公开(公告)号：JPH03181215A
公开(公告)日：1991-08-07
申请号：JP30695090
申请日：1990-11-13
申请人： HEWLETT PACKARD CO
发明人： ROBAATO EMU BEITEI
摘要： PURPOSE: To minimize mutual interference between continuous pulses by providing the differential channel filter with a differentially LC ladder network, a differential feedforward circuit and a means for changing the gain of the differential feedforward circuit and controlling the amplitude of a narrowed pulse output signal. CONSTITUTION: Variable, single adjustment, differential, and feedforward voltage elements are algebraically combined by a multiplier 34 with the differential output of the network at conductors 30, 32 and the multiplier 34 multiplies adjustable gain control voltage by voltage between grounding points at respective terminals of a capacitor. A feedforward gain signal to be a differential output from the multiplier 34 is added/subtracted to/from a ladder network output in accordance with control voltage combined by the multiplier 34. The LC network controls the narrowing of pulse width and the feedforward gain circuit controls the voltage output of pulse width to control gain.
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公开(公告)号：JPH03108814A
公开(公告)日：1991-05-09
申请号：JP24553189
申请日：1989-09-21
发明人： TANAKA TOYOHISA
摘要： PURPOSE:To keep a pulse width being a setup time width or over of an element driven by a pulse by recording the pulse width to a prescribed value or over. CONSTITUTION:A clock input terminal CLK of a D flip-flop connects to an input pulse input terminal 1 and one input terminal of an OR circuit OR. An output terminal Q connects to other input terminal of the OR circuit and connects to a reset terminal R via a delay circuit DL. When an H level of the output terminal Q is inputted to the reset terminal R via the delay circuit DL whose delay time is Td, the level of the output terminal Q goes to an L level, and when the input pulse is at an L level, an output terminal 2 is also at an L level and the output pulse width goes to Td.
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公开(公告)号：JPH02122293A
公开(公告)日：1990-05-09
申请号：JP27642588
申请日：1988-10-31
申请人： NEC CORP
发明人： HIRAGA MASATOMI
摘要： PURPOSE:To send out a pulse signal at a high speed by combining an npn transistor and a pnp transistor so that a temperature variation of the respective base - emitter forward drop voltages can be offset each other. CONSTITUTION:As for an npn transistor TR 3, its base is connected to an integrated decision element IC 1 of an input pulse signal line, and its collector is connected to a voltage VEE, and connected to a voltage VCC through an emitter resistance 3R. As for a pnp transistor TR 2, its secondary side is connected to a transformer T 4 connected to a transmission line, its base is connected to the emitter of the TR 3, and also, its emitter is connected to an earth, and its collector is connected to a voltage VCC through a primary side of the transformer T 4. In this constitution, when base - emitter forward drop voltages of the TR 2 and the TR 3 are denoted as VBE1, VBE2, respectively, a DC voltage VBE2 in a point A is increased as a temperature rise by a temperature characteristic. Also, an absolute value of the voltage VBE1 by which the TR 2 is turned ON becomes small as the temperature rise, and also, the TR 2 is turned ON by a prescribed ratio of a driving pulse signal. As a result, a constant pulse signal is sent out of the transformer T 4.
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公开(公告)号：JPH0296421A
公开(公告)日：1990-04-09
申请号：JP24816588
申请日：1988-09-30
发明人： TOGASHI SHIGEKAZU
摘要： PURPOSE:To improve the reliability of the signal transmission by constituting a transmitting circuit which can be transmitted even up to a binary signal with many low frequency components by using a rotation transformer. CONSTITUTION:When a binary signal A is added to a resistance R1, a combination inductance L of a rotation transformer 3 is sufficient small for a resistance R1 and a current waveform becomes A shown in the figure. To the output edge of the transformer 3, an impedance converting means 4 is connected, an HPF is constituted, an output current waveform B, is obtained and a current value p-px is made two times as much as a current value p-p to flow at the resistance R1. On the other hand, the binary signal of a binarizing means 6 is positive-fed back through an LPF 7 and a voltage-current converting means 8 and a current value p-py is made approximately 1/2 of the current value p-px. Consequently, to a voltage-current converting means 5, the voltage to add the output current of the converting means 4 and the output current of the converting means 8 is added, added to the binarizing means 6 as an input voltage waveform C and a complete binary signal can be realized.
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公开(公告)号：JPH0290837A
公开(公告)日：1990-03-30
申请号：JP24092188
申请日：1988-09-28
发明人： WATANABE HIDETAKA
摘要： PURPOSE:To obtain a fixed and stable threshold by setting the threshold of a photocoupler by means of resistances and bypassing a current flowing in a light-emitting element when a transmission signal is larger than the threshold by means of a bypass transistor between both ends of the light-emitting element of a second photocoupler. CONSTITUTION:An input signal is inputted between the input terminals 7 and 8 of a transmission circuit 1A and is photoelectrically converted by the first photocoupler 6. The output of the first photocoupler 6 controls an output transistor 5 and transmits a transmission signal S2 to a bidirectional signal line 40. An output signal S4 photoelectrically converts the transmission signal S2 based on a threshold TL2 decided by the resistances 30 and 31, and it is outputted from an output terminal 24. Namely, when the level of the transmission signal S2 is larger than a threshold TK2, the bypass transistor 29 is conducted, and the output signal S4 of a low level is outputted from the output terminal 24. Thus, the fixed and stable threshold can be obtained.
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公开(公告)号：JPH0287713A
公开(公告)日：1990-03-28
申请号：JP23901488
申请日：1988-09-26
发明人： WATANABE HIDETAKA
摘要： PURPOSE:To make the rise of an output signal steep by processing and inputting an input signal via a photocoupler by an output circuit and a pullup circuit. CONSTITUTION:An input signal IS to a transmission circuit 1A is photoelectric- converted by a photocoupler 4, inverted by an inverter 5 of an output circuit and when the level of the signal IS is at L, an output transistor(TR) 6 is turned on. On the other hand, the output of the photocoupler 4 is differentiated by a time constant circuit comprising a capacitor 10 and a resistor 11, a signal S2 being at an L level for a prescribed period t1 is outputted from an inverter 12 whose threshold level is set by a differentiation signal S1, a pullup TR 13 is turned on for the period t1 thereby improving unsharpened waveform of an output signal OS via the pullup resistor 14. Thus, the rise of the signal OS is made steep even if the number of reception terminal equipments is less thereby prolonging the distance of a transmission line 9.
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公开(公告)号：JPH01161944A
公开(公告)日：1989-06-26
申请号：JP31907887
申请日：1987-12-18
申请人： NEC CORP
发明人： SHOJI NOBORU
摘要： PURPOSE:To eliminate distortion in a pulse width by connecting a parallel circuit composed of a resistor and a capacitor between an output terminal of a driving circuit and an unbalanced type transmission line. CONSTITUTION:Reception circuits 4, 5 are connected respectively while being branched to the unbalanced type transmission line 1, one terminal of resistors 8, 9 is connected to the unbalanced type transmission line 1 and capacitors 10, 11 are connected in parallel with the resistors 8, 9 respectively. Moreover, the driving circuits 6, 7 are connected respectively to the other terminal of the resistors 8, 9, and drive a pulse signal to send it to the unbalanced type transmission line 1. When the pulse signal is propagated through the unbalanced type transmission line 1, excess transmission loss is given to the high frequency component and the leading edge and trailing edge of the waveform are unsharpened but the reactance of the capacitor 10 is reduced at high frequencies. Since the high frequency component of the pulse signal is sent excessively to the unbalanced type transmission line 1, the waveform of the pulse signal reaching the termination resistors 2, 3 and the reception circuits 4, 5 is sufficiently corrected.
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公开(公告)号：JPH01161943A
公开(公告)日：1989-06-26
申请号：JP31907787
申请日：1987-12-18
申请人： NEC CORP
发明人： SHOJI NOBORU
摘要： PURPOSE:To eliminate pulse width distortion by connecting a parallel circuit composed of a resistor and a capacitor between each of a couple of output terminals of a differential type drive circuit and two transmission lines constituting a balanced type transmission line respectively. CONSTITUTION:The differential driving circuits 7, 8 are connected respectively to other end of resistors 11, 12 in pairs and other ends of resistors 13, 14 in pairs, drive a pulse signal respectively to send the pulse signal to the balanced type transmission line 120 via parallel connection circuits 19, 29 composed of two resistors and capacitors respectively. Thus, the pulse signal in the propagation through the balanced type transmission line 120 receives a transmission loss in its high frequency component and the leading edge and trailing edge of the waveform are unsharpened, but since the high frequency component of the pulse signal by the action of capacitors 15, 16 is sent excessively, the waveform of the pulse signal reaching the termination resistors 3, 4 and the differential type reception circuits 5, 6 is corrected sufficiently. Thus, the distortion in the pulse width is eliminated.
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