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公开(公告)号：US08810498B2
公开(公告)日：2014-08-19
申请号：US12898090
申请日：2010-10-05
Applicant: Sungman Kim , Beomjun Kim , Bong-Jun Lee , Hong-Woo Lee , Jae-seung Kim , Byung-Su Oh
Inventor： Sungman Kim , Beomjun Kim , Bong-Jun Lee , Hong-Woo Lee , Jae-seung Kim , Byung-Su Oh
CPC classification number: G09G3/3677
Abstract: A gate driving circuit includes a plurality of stages which are connected to each other one after another and each stage of the plurality of stages outputs a gate voltage to a corresponding gate line of a plurality of gate lines in response to at least one clock signal. Each stage of the plurality of stages includes; a voltage output part which outputs the gate voltage, an output driving part which drives the voltage output part, a holding part which holds the gate line at an off-voltage, and a discharge part arranged at a first end of the gate line to discharge the gate line to the off-voltage in response to the gate voltage output from the voltage output part.
Abstract translation: 栅极驱动电路包括多个级彼此连接并且多级的每一级响应于至少一个时钟信号而将栅极电压输出到多条栅极线的对应栅极线。 多个阶段的每个阶段包括： 输出栅极电压的电压输出部分，驱动电压输出部分的输出驱动部分，将栅极线保持在截止电压的保持部分和布置在栅极线的第一端以放电的放电部分 栅极线响应于从电压输出部分输出的栅极电压而断开电压。
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公开(公告)号：US20110267326A1
公开(公告)日：2011-11-03
申请号：US12898090
申请日：2010-10-05
Applicant: Sungman KIM , Beomjun KIM , Bong-Jun LEE , Hong-Woo LEE , Jae-seung KIM , Byung-Su OH
Inventor： Sungman KIM , Beomjun KIM , Bong-Jun LEE , Hong-Woo LEE , Jae-seung KIM , Byung-Su OH
CPC classification number: G09G3/3677
Abstract: A gate driving circuit includes a plurality of stages which are connected to each other one after another and each stage of the plurality of stages outputs a gate voltage to a corresponding gate line of a plurality of gate lines in response to at least one clock signal. Each stage of the plurality of stages includes; a voltage output part which outputs the gate voltage, an output driving part which drives the voltage output part, a holding part which holds the gate line at an off-voltage, and a discharge part arranged at a first end of the gate line to discharge the gate line to the off-voltage in response to the gate voltage output from the voltage output part,
Abstract translation: 栅极驱动电路包括多个级彼此连接并且多级的每一级响应于至少一个时钟信号而将栅极电压输出到多条栅极线的对应栅极线。 多个阶段的每个阶段包括： 输出栅极电压的电压输出部分，驱动电压输出部分的输出驱动部分，将栅极线保持在截止电压的保持部分和布置在栅极线的第一端以放电的放电部分 所述栅极线响应于从所述电压输出部输出的栅极电压而断开所述截止电压，
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