公开(公告)号：US07583509B2

公开(公告)日：2009-09-01

申请号：US11325083

申请日：2006-01-04

申请人： In-su Choi ,  Joon-hee Lee ,  Hee-joo Choi ,  Il-guy Jung

发明人： In-su Choi ,  Joon-hee Lee ,  Hee-joo Choi ,  Il-guy Jung

IPC分类号： H05K1/00

CPC分类号： G11C5/063 ,  G11C5/04 ,  H05K1/148 ,  H05K2201/10159

摘要： A memory module and a memory system are provided. The memory module includes a first circuit board on which at least one memory chip is mounted, a second circuit board on which at least one memory chip is mounted, and a flexible coupler electrically connecting the first circuit board to the second circuit board. The memory module is bendable and is configured to extend around a memory controller. The memory chips are electrically coupled with the memory controller via a respective plurality of signal lines. The bendable memory module is configured to be bent around the memory controller such that respective lengths of the signal lines are equal.

摘要翻译： 提供了存储器模块和存储器系统。 存储器模块包括其上安装有至少一个存储器芯片的第一电路板，安装至少一个存储器芯片的第二电路板和将第一电路板电连接到第二电路板的柔性耦合器。 存储器模块是可弯曲的并且被配置为围绕存储器控制器延伸。 存储器芯片通过相应的多个信号线与存储器控制器电耦合。 可弯曲存储器模块被配置为围绕存储器控制器弯曲，使得信号线的相应长度相等。

公开(公告)号：US20140157030A1

公开(公告)日：2014-06-05

申请号：US14091912

申请日：2013-11-27

申请人： Young-Jin PARK ,  Won-Seok LEE ,  Il-Guy JUNG

发明人： Young-Jin PARK ,  Won-Seok LEE ,  Il-Guy JUNG

IPC分类号： G06F1/32

CPC分类号： G06F1/3275 ,  G06F1/3209 ,  G06F1/3225 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

摘要： A main memory system includes a main memory device including a first memory device implemented with a volatile memory and a second memory device implemented with a non-volatile memory, the main memory system being configured such that, when entering a sleep mode, the memory device reads a portion of data stored in the first memory device to store the read data in the second memory device, and, after the portion of data is read, the first memory device and the second memory device are powered off.

摘要翻译： 主存储器系统包括主存储器件，其包括实施有易失性存储器的第一存储器件和由非易失性存储器实现的第二存储器件，所述主存储器系统被配置为使得当进入休眠模式时，存储器件 读取存储在第一存储器件中的数据的一部分以将读取的数据存储在第二存储器件中，并且在数据的部分被读取之后，第一存储器件和第二存储器件被断电。

公开(公告)号：US09547360B2

公开(公告)日：2017-01-17

申请号：US14091912

申请日：2013-11-27

申请人： Young-Jin Park ,  Won-Seok Lee ,  Il-Guy Jung

发明人： Young-Jin Park ,  Won-Seok Lee ,  Il-Guy Jung

IPC分类号： G06F1/32

CPC分类号： G06F1/3275 ,  G06F1/3209 ,  G06F1/3225 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

摘要： A main memory system includes a main memory device including a first memory device implemented with a volatile memory and a second memory device implemented with a non-volatile memory, the main memory system being configured such that, when entering a sleep mode, the memory device reads a portion of data stored in the first memory device to store the read data in the second memory device, and, after the portion of data is read, the first memory device and the second memory device are powered off.

摘要翻译： 主存储器系统包括主存储器件，其包括实施有易失性存储器的第一存储器件和由非易失性存储器实现的第二存储器件，所述主存储器系统被配置为使得当进入休眠模式时，存储器件 读取存储在第一存储器件中的数据的一部分以将读取的数据存储在第二存储器件中，并且在数据的部分被读取之后，第一存储器件和第二存储器件被断电。

公开(公告)号：US20060176723A1

公开(公告)日：2006-08-10

申请号：US11325083

申请日：2006-01-04

申请人： In-su Choi ,  Joon-hee Lee ,  Hee-joo Choi ,  Il-guy Jung

发明人： In-su Choi ,  Joon-hee Lee ,  Hee-joo Choi ,  Il-guy Jung

IPC分类号： G11C5/02

CPC分类号： G11C5/063 ,  G11C5/04 ,  H05K1/148 ,  H05K2201/10159

摘要： A memory module and a memory system are provided. The memory module includes a first circuit board on which at least one memory chip is mounted, a second circuit board on which at least one memory chip is mounted, and a flexible coupler electrically connecting the first circuit board to the second circuit board. The memory module is bendable and is configured to extend around a memory controller. The memory chips are electrically coupled with the memory controller via a respective plurality of signal lines. The bendable memory module is configured to be bent around the memory controller such that respective lengths of the signal lines are equal.