公开(公告)号：US5316586A

公开(公告)日：1994-05-31

申请号：US905018

申请日：1992-06-26

申请人： Michael E. Hoenk ,  Paula J. Grunthaner ,  Frank J. Grunthaner

发明人： Michael E. Hoenk ,  Paula J. Grunthaner ,  Frank J. Grunthaner

IPC分类号： C23C14/50 ,  C30B23/02 ,  C23C14/24

CPC分类号： C23C14/50 ,  C30B23/02

摘要： The sample holder of the invention is formed of the same semiconductor crystal as the integrated circuit on which the molecular beam expitaxial process is to be performed. In the preferred embodiment, the sample holder comprises three stacked micro-machined silicon wafers: a silicon base wafer having a square micro-machined center opening corresponding in size and shape to the active area of a CCD imager chip, a silicon center wafer micro-machined as an annulus having radially inwardly pointing fingers whose ends abut the edges of and center the CCD imager chip within the annulus, and a silicon top wafer micro-machined as an annulus having cantilevered membranes which extend over the top of the CCD imager chip. The micro-machined silicon wafers are stacked in the order given above with the CCD imager chip centered in the center wafer and sandwiched between the base and top wafers. The thickness of the center wafer is about 20% less than the thickness of the CCD imager chip. Preferably, four titanium wires, each grasping the edges of the top and base wafers, compress all three wafers together, flexing the cantilever fingers of the top wafer to accommodate the thickness of the CCD imager chip, acting as a spring holding the CCD imager chip in place.

摘要翻译： 本发明的样品保持器由与要在其上进行分子束外延过程的集成电路相同的半导体晶体形成。 在优选实施例中，样品架包括三个堆叠的微加工硅晶片：硅基晶片，其具有对应于CCD成像器芯片的有源区域的尺寸和形状的方形微加工中心开口，硅中心晶片微型芯片， 被加工成具有径向向内指向的指状物的环，其端部邻接环形区域内的CCD成像器芯片的边缘并使其中心，以及硅顶部晶片，其被微加工成具有在CCD成像器芯片的顶部上方延伸的悬臂膜的环形空间。 微加工的硅晶片按照上面给出的顺序堆叠，CCD成像器芯片以中心晶片为中心并夹在基底和顶部晶片之间。 中心晶片的厚度比CCD成像器芯片的厚度小约20％。 优选地，每个抓住顶部和底部晶片的边缘的四根钛丝将所有三个晶片压缩在一起，使顶部晶片的悬臂指状物弯曲以适应CCD成像器芯片的厚度，作为保持CCD成像器芯片的弹簧 到位。

公开(公告)号：US06803570B1

公开(公告)日：2004-10-12

申请号：US10618078

申请日：2003-07-11

申请人： Charles E. Bryson, III ,  Frank J. Grunthaner ,  Paula J. Grunthaner

发明人： Charles E. Bryson, III ,  Frank J. Grunthaner ,  Paula J. Grunthaner

IPC分类号： H01J37252

CPC分类号： H01J33/04

摘要： A vacuum window transmitting keV electrons and usable for high-pressure electron analysis such as XPS and AES in which the sample is positioned outside the UHV analyzer chamber, possibly in a controlled gas environment, relatively close to the window. The window includes a grid formed from a support layer and a thin window layer supported between the ribs and having a thickness preferably of 2 to 3 nm. The window and support layers may be deposited on a silicon wafer and the support layer is lithographically defined into the grid. The wafer is backside etched to expose the back of the grid and its supported window layer. Such a window enables compact and easily used electron analyzers and further allows control of the gas environment at the sample surface during analysis.

摘要翻译： 传输keV电子并可用于高压电子分析的真空窗口，例如XPS和AES，其中样品位于特高压分析器室外，可能在相对靠近窗口的受控气体环境中。 窗口包括由支撑层形成的格栅和支撑在肋之间的薄窗层，其厚度优选为2至3nm。 窗口和支撑层可以沉积在硅晶片上，并且支撑层被光刻地限定在栅格中。 晶片被背面蚀刻以暴露网格的背面及其支撑的窗口层。 这样的窗口使得能够紧凑且易于使用的电子分析器，并且还允许在分析期间控制样品表面处的气体环境。

公开(公告)号：US5376810A

公开(公告)日：1994-12-27

申请号：US173133

申请日：1993-12-21

申请人： Michael E. Hoenk ,  Paula J. Grunthaner ,  Frank J. Grunthaner ,  Robert W. Terhune ,  Michael H. Hecht

发明人： Michael E. Hoenk ,  Paula J. Grunthaner ,  Frank J. Grunthaner ,  Robert W. Terhune ,  Michael H. Hecht

IPC分类号： H01L27/148 ,  H01L29/796 ,  H01L27/14 ,  H01L31/00

CPC分类号： H01L27/148

摘要： The backside surface potential well of a backside-illuminated CCD is confined to within about half a nanometer of the surface by using molecular beam epitaxy (MBE) to grow a delta-doped silicon layer on the back surface. Delta-doping in an MBE process is achieved by temporarily interrupting the evaporated silicon source during MBE growth without interrupting the evaporated p+ dopant source (e.g., boron). This produces an extremely sharp dopant profile in which the dopant is confined to only a few atomic layers, creating an electric field high enough to confine the backside surface potential well to within half a nanometer of the surface. Because the probability of UV-generated electrons being trapped by such a narrow potential well is low, the internal quantum efficiency of the CCD is nearly 100% throughout the UV wavelength range. Furthermore, the quantum efficiency is quite stable.

摘要翻译： 通过使用分子束外延（MBE）在后表面上生长δ掺杂硅层，将背面照射的CCD的背面表面势阱限制在表面的约半纳米之内。 通过在MBE生长期间暂时中断蒸发的硅源而不中断蒸发的p +掺杂剂源（例如硼）来实现MBE工艺中的增量掺杂。 这产生非常清楚的掺杂剂分布，其中掺杂剂仅限于几个原子层，产生足够高的电场以将背面表面势阱很好地限制在表面的半纳米以内。 由于紫外线产生的电子被这样一个狭窄的势阱捕获的概率很低，所以在整个UV波长范围内，CCD的内部量子效率接近100％。 此外，量子效率相当稳定。

公开(公告)号：US5010037A

公开(公告)日：1991-04-23

申请号：US257758

申请日：1988-10-14

申请人： True-Lon Lin ,  Robert W. Fathauer ,  Paula J. Grunthaner

发明人： True-Lon Lin ,  Robert W. Fathauer ,  Paula J. Grunthaner

IPC分类号： H01L21/285

CPC分类号： H01L21/28518

摘要： Pinhole-free epitaxial CoSi.sub.2 films (14') are fabricated on (111)-oriented silicon substrates (10) with a modified solid phase epitaxy technique which utilizes (1) room temperature stoichiometric (1:2) codeposition of Co and Si followed by (2) room temperature deposition of an amorphous silicon capping layer (16), and (3) in situ annealing at a temperature ranging from about 500.degree. to 750.degree. C.

摘要翻译： 利用改进的固相外延技术在（111）取向的硅衬底（10）上制造无针孔外延CoSi2膜（14'），其使用（1）Co和Si的室温化学计量（1:2）共沉积，随后是 （2）非晶硅覆盖层（16）的室温沉积，（3）在约500℃至750℃的温度范围内进行原位退火。