公开(公告)号：US20230208430A1

公开(公告)日：2023-06-29

申请号：US17561457

申请日：2021-12-23

Applicant: Somnath Kundu ,  Amy Whitcombe ,  Stefano Pellaerano ,  Brent R. Carlton

Inventor： Somnath Kundu ,  Amy Whitcombe ,  Stefano Pellaerano ,  Brent R. Carlton

IPC: H03M1/10

CPC classification number: H03M1/1019

Abstract: An apparatus can include a digital-to-analog converter (DAC) and calibration circuitry including an oscillator. The calibration circuitry can be coupled to an output of the DAC, the calibration circuitry to sample and count DAC output pulses for at least two consecutive pulses using at least two separate counter circuits. The calibration circuitry can determine error between at least two consecutive pulses and provide a correction value based on the error. The apparatus can further include correction circuitry to provide a calibration signal to the DAC based on the correction value.

公开(公告)号：US08183911B2

公开(公告)日：2012-05-22

申请号：US12581578

申请日：2009-10-19

Applicant: Somnath Kundu ,  Pikul Sarkar ,  Nitin Gupta

Inventor： Somnath Kundu ,  Pikul Sarkar ,  Nitin Gupta

IPC: G11C5/14

CPC classification number: H03K17/00 ,  H03K17/0822

Abstract: An integrated circuit includes a number of pads. The integrated circuit further includes a cascode transistor having an open drain connection to a first one of the pads. A bias generator circuit is included in the integrated circuit. The bias generator circuit has an output connected to a gate terminal of the cascode transistor. In a first mode of operation, the bias generator outputs a bias signal that is derived from an integrated circuit supply voltage present at a second one of the pads. However, in a second mode of operation provided when the integrated circuit supply voltage is not present, the bias generator generates the bias signal derived from a voltage present at the first one of the pads.

Abstract translation: 集成电路包括多个焊盘。 集成电路还包括具有到第一个焊盘的开漏连接的共源共栅晶体管。 集成电路中包含偏置发生器电路。 偏置发生器电路具有连接到共源共栅晶体管的栅极端子的输出。 在第一操作模式中，偏置发生器输出偏置信号，该偏置信号是从存在于第二焊盘处的集成电路电源电压导出的。 然而，在不存在集成电路电源电压时提供的第二操作模式中，偏置发生器产生从存在于第一焊盘处的电压导出的偏置信号。

公开(公告)号：US20110090002A1

公开(公告)日：2011-04-21

申请号：US12581578

申请日：2009-10-19

Applicant: Somnath Kundu ,  Pikul Sarkar ,  Nitin Gupta

Inventor： Somnath Kundu ,  Pikul Sarkar ,  Nitin Gupta

IPC: G05F1/10 ,  G11C5/14

CPC classification number: H03K17/00 ,  H03K17/0822

Abstract: An integrated circuit includes a number of pads. The integrated circuit further includes a cascode transistor having an open drain connection to a first one of the pads. A bias generator circuit is included in the integrated circuit. The bias generator circuit has an output connected to a gate terminal of the cascode transistor. In a first mode of operation, the bias generator outputs a bias signal that is derived from an integrated circuit supply voltage present at a second one of the pads. However, in a second mode of operation provided when the integrated circuit supply voltage is not present, the bias generator generates the bias signal derived from a voltage present at the first one of the pads.

Abstract translation: 集成电路包括多个焊盘。 集成电路还包括具有到第一个焊盘的开漏连接的共源共栅晶体管。 集成电路中包含偏置发生器电路。 偏置发生器电路具有连接到共源共栅晶体管的栅极端子的输出。 在第一操作模式中，偏置发生器输出偏置信号，该偏置信号是从存在于第二焊盘处的集成电路电源电压导出的。 然而，在不存在集成电路电源电压时提供的第二操作模式中，偏置发生器产生从存在于第一焊盘处的电压导出的偏置信号。