公开(公告)号：US4882690A

公开(公告)日：1989-11-21

申请号：US911461

申请日：1986-09-25

申请人： Takao Shinsha ,  Masato Morita ,  Yoshinori Sakataya ,  Yoji Tsuchiya ,  Mitsuhiro Hikosaka ,  Junji Koshishita ,  Keiho Akiyama ,  Takashige Kubo

发明人： Takao Shinsha ,  Masato Morita ,  Yoshinori Sakataya ,  Yoji Tsuchiya ,  Mitsuhiro Hikosaka ,  Junji Koshishita ,  Keiho Akiyama ,  Takashige Kubo

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： A logic design automation system examines correspondence relationship among sublogics in intermediate gate-level logic (containing neither physical design information nor manually optimized logic design information) produced from updated functional-level logic and current gate-level logic (containing the above information) to identify corresponding sublogics and non-corresponding sublogics of the gate-level logics with reference to primary input/output signals and input/output gates. For the corresponding sublogics, the corresponding sublogics of the current gate-level logic are selected, and for the non-corresponding sublogics, the non-corresponding sublogics of the intermediate gate-level logic are selected. The selected sublogics are combined to synthesize updated gate-level logic which preserved therein the physical design information and the manually optimized logic design information for portions of the current gate-level logic which need not be modified.

摘要翻译： 逻辑设计自动化系统检查从更新的功能级逻辑和当前门级逻辑（包含上述信息）产生的中间门级逻辑（不包含物理设计信息或手动优化的逻辑设计信息）的子学习之间的对应关系，以识别 参考主要输入/输出信号和输入/输出门的门级逻辑的相应子语义和非对应子语义。 对于相应的子代码，选择当前门级逻辑的相应子代码，并且对于非对应的子代码，选择中间门级逻辑的非对应子语义。 所选择的子实体被组合以合成更新的门级逻辑，其中保留了不需要修改的当前门级逻辑的部分的物理设计信息和手动优化的逻辑设计信息。