公开(公告)号：US09006872B2

公开(公告)日：2015-04-14

申请号：US13879911

申请日：2011-09-28

申请人： Yong-Tae Kwon

发明人： Yong-Tae Kwon

IPC分类号： H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/34 ,  H01L23/02 ,  H01L23/00 ,  H01L21/56 ,  H01L25/10 ,  H01L23/31

CPC分类号： H01L24/25 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/20 ,  H01L24/82 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/20 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/14511 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/1904 ,  H01L2924/19105

摘要： In one embodiment, a semiconductor chip package includes an insulation frame having an opening part formed in a center thereof and a via hole formed around the opening part; a semiconductor chip disposed cm the opening part; a conductive part filling the via hole; an inner insulation layer formed on bottom surfaces of the semiconductor chip and the insulation frame so as to expose a bottom surface of the conductive part; and an inner signal pattern formed on the inner insulation layer and electrically connecting the semiconductor chip and the conductive part. Embodiments also relate to a semiconductor module including a vertical stack of a plurality of the semiconductor chip packages, and to a method for manufacturing the same.

摘要翻译： 在一个实施例中，半导体芯片封装包括具有形成在其中心的开口部分和围绕开口部分形成的通孔的绝缘框架; 半导体芯片，设置在所述开口部分上; 填充通孔的导电部分; 形成在半导体芯片的底面和绝缘框架上的内绝缘层，以露出导电部件的底面; 以及形成在所述内绝缘层上并且电连接所述半导体芯片和所述导电部件的内部信号图案。 实施例还涉及包括多个半导体芯片封装的垂直堆叠的半导体模块及其制造方法。

公开(公告)号：US20120286419A1

公开(公告)日：2012-11-15

申请号：US13457165

申请日：2012-04-26

申请人： Yong Tae Kwon ,  Gi Jo Jung

发明人： Yong Tae Kwon ,  Gi Jo Jung

IPC分类号： H01L25/07 ,  H01L21/50 ,  H01L23/48

CPC分类号： H01L23/3107 ,  H01L21/486 ,  H01L23/49838 ,  H01L23/5384 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

摘要： A semiconductor package substrate is provided. The package substrate includes a mold base and an interposer block embedded in the mold base, said interposer block having a plurality of vertical conductive lines therein. A metallization layer is formed on the surface of the interposer block or the mold base, said metallization layer being electrically connected to at least one of the vertical conductive lines. A semiconductor chip may be mounted on or embedded in the mold base.

摘要翻译： 提供半导体封装基板。 封装基板包括模具基座和嵌入在模具基座中的插入块，所述插入块在其中具有多个垂直导线。 在插入块或模座的表面上形成金属化层，所述金属化层电连接至至少一个垂直导线。 半导体芯片可以安装在模具底座上或嵌入在模具底座中。

公开(公告)号：US20060032456A1

公开(公告)日：2006-02-16

申请号：US10533258

申请日：2003-10-01

申请人： Yong-Tae Kwon

发明人： Yong-Tae Kwon

IPC分类号： A01K1/03

CPC分类号： A01K1/0254

摘要： This invention is about a bag for a pet. It has fluid acceptation space which is suitable for physical character of a pet. Also it makes a pet safe and a man easy to walk as wearing more closer to his body. It consist of a main body which of space made bottom gradient to body direction from the front of be in pet's head, a form frame which set a pair with a flexible cushion on open surface and get smaller in diameter, and a changeable length shoulder strap which link both of a main body.

摘要翻译： 本发明涉及宠物袋。 它具有适合宠物身体特征的流体接受空间。 另外它使宠物安全，一个男人穿着更靠近他的身体，容易走路。 它包括一个主体，它的空间从宠物头部的前方向底部方向倾斜，形成框架，其在开放表面上设置一对柔性缓冲垫，并且具有更小的直径，以及可变长度的肩带 哪个链接两个主体。

公开(公告)号：US06339260B1

公开(公告)日：2002-01-15

申请号：US09394508

申请日：1999-09-13

申请人： Yong-Tae Kwon

发明人： Yong-Tae Kwon

IPC分类号： H01L2348

CPC分类号： H01L24/10 ,  H01L21/4853 ,  H01L23/3121 ,  H01L23/4985 ,  H01L24/13 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/4824 ,  H01L2224/48451 ,  H01L2224/48465 ,  H01L2224/48477 ,  H01L2224/4942 ,  H01L2224/73215 ,  H01L2224/85051 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2224/45099 ,  H01L2924/00

摘要： A chip size package for a semiconductor device according to the present invention is fabricated by: etching a copper film applied on an insulating film tape, except for longitudinal marginal portions of the copper film, metal pattern units thereof which are peripheral to portions corresponding to chip pads of a semiconductor chip and portions thereof connecting the longitudinal marginal portions and the metal pattern units; forming a solder mask on the insulating film tape excluding inner holes of the metal pattern units, the copper film excluding four edge portions of the longitudinal marginal portions thereof and exterior circular marginal portions of the metal pattern units; electroplating portions of surfaces of the metal pattern units on which the solder mask is not formed, for thereby forming metal pattern unit-electroplates; attaching the semiconductor chip to a bottom surface of the insulating film tape; sealing side surfaces and a bottom surface of the semiconductor chip with an epoxy mold compound; etching portions of the insulating film tape formed on the chip pads for thereby exposing the chip pads; electrically connecting by wires the metal pattern unit-electrodes and the corresponding chip pads; and eliminating portions of the copper film remaining at the four edge portions of the longitudinal marginal portions thereof and cutting the resultant insulating film tape to be separated into individual units.

摘要翻译： 根据本发明的用于半导体器件的芯片尺寸封装通过以下方式制造：除了铜膜的纵向边缘部分之外，蚀刻施加在绝缘膜带上的铜膜，其对应于芯片的部分的周边的金属图案单元 半导体芯片的焊盘和连接纵向边缘部分和金属图案单元的部分; 在除了金属图案单元的内孔之外的绝缘膜带上形成除了其纵向边缘部分的四个边缘部分的铜膜和金属图案单元的外部圆形边缘部分之外的铜膜; 在其上未形成焊料掩模的金属图案单元的表面的电镀部分，从而形成金属图案单元电镀层; 将半导体芯片附接到绝缘膜带的底面; 用环氧树脂模塑料密封半导体芯片的侧表面和底表面; 蚀刻形成在芯片焊盘上的绝缘膜带的部分，从而使芯片焊盘露出; 通过电线电连接金属图案单元电极和相应的芯片焊盘; 并且除去残留在其纵向边缘部分的四个边缘部分处的铜膜的部分，并将所得到的绝缘膜带切割成单独的单元。

公开(公告)号：US5861312A

公开(公告)日：1999-01-19

申请号：US982956

申请日：1997-12-02

申请人： Alexander Varshavsky ,  Yong Tae Kwon

发明人： Alexander Varshavsky ,  Yong Tae Kwon

IPC分类号： C12N15/09 ,  A61K31/7088 ,  A61K45/00 ,  A61K48/00 ,  A61P21/00 ,  C07K14/47 ,  C12N1/15 ,  C12N1/21 ,  C12N5/10 ,  C12N9/00 ,  C12N15/12 ,  C12N15/63

CPC分类号： C12N9/93 ,  C12Y603/02019

摘要： Disclosed here is a nucleic acid sequence encoding a recognition component of the N-end rule pathway. This nucleic acid sequence is characterized by the ability to specifically hybridize to the nucleic acid sequence of SEQ ID NO 1 under stringent hybridization conditions. Such conditions are defined below. Also disclosed is a nucleic acid sequence encoding a recognition component of the N-end rule pathway which is characterized by the ability to specifically hybridize to the nucleic acid sequence of SEQ ID NO 2 under stringent hybridization conditions. Also disclosed are DNA expression vectors containing nucleic acid sequences of the type described above, as well as cells transformed with such expression vectors. Further disclosed are applications for the compositions described above.

摘要翻译： 这里公开了编码N末端规则途径的识别成分的核酸序列。 该核酸序列的特征在于在严格杂交条件下与SEQ ID NO 1的核酸序列特异性杂交的能力。 这些条件定义如下。 还公开了编码N末端规则通路的识别组分的核酸序列，其特征在于在严格杂交条件下与SEQ ID NO 2的核酸序列特异性杂交的能力。 还公开了含有上述类型的核酸序列的DNA表达载体以及用这种表达载体转化的细胞。 进一步公开的是上述组合物的应用。

公开(公告)号：US07588901B2

公开(公告)日：2009-09-15

申请号：US11473568

申请日：2006-06-22

申请人： Yong Tae Kwon ,  Anna Kashina ,  Alexander Varshavsky

发明人： Yong Tae Kwon ,  Anna Kashina ,  Alexander Varshavsky

IPC分类号： G01N33/53 ,  G01N33/573 ,  G01N33/533 ,  G01N33/535 ,  C12Q1/48 ,  C12Q1/02 ,  C12N9/10 ,  C12N15/54 ,  C12N15/81 ,  C12N11/16

CPC分类号： C12Q1/48 ,  G01N2333/515 ,  G01N2500/00 ,  G01N2500/04 ,  G01N2500/10

摘要： The invention provides methods and compositions for modulating angiogenesis in a subject. The methods of modulating angiogenesis in a subject include administering to the subject a modulator of N-terminal arginylation activity. The invention also provides a method of identifying such a modulator and a method of in vitro screening for modulators of N-terminal arginylation activity. Additionally, the invention provides a method of treating an angiogenesis-related disorder.

摘要翻译： 本发明提供了调节受试者血管生成的方法和组合物。 调节受试者血管生成的方法包括向受试者施用N-末端精氨酰化活性的调节剂。 本发明还提供鉴定这种调节剂的方法和一种体外筛选N-末端精氨酰化活性调节剂的方法。 另外，本发明提供了治疗血管发生相关病症的方法。

公开(公告)号：US6159732A

公开(公告)日：2000-12-12

申请号：US228317

申请日：1999-01-11

申请人： Alexander Varshavsky ,  Yong Tae Kwon

发明人： Alexander Varshavsky ,  Yong Tae Kwon

IPC分类号： C12N15/09 ,  A61K31/7088 ,  A61K45/00 ,  A61K48/00 ,  A61P21/00 ,  C07K14/47 ,  C12N1/15 ,  C12N1/21 ,  C12N5/10 ,  C12N9/00 ,  C12N15/12 ,  C12N5/00

CPC分类号： C12N9/93 ,  C12Y603/02019

摘要： Disclosed here is a nucleic acid sequence encoding a recognition component of the N-end rule pathway. This nucleic acid sequence is characterized by the ability to specifically hybridize to the nucleic acid sequence of SEQ ID NO 1 under stringent hybridization conditions. Such conditions are defined below. Also disclosed is a nucleic acid sequence encoding a recognition component of the N-end rule pathway which is characterized by the ability to specifically hybridize to the nucleic acid sequence of SEQ ID NO 2 under stringent hybridization conditions. Also disclosed are DNA expression vectors containing nucleic acid sequences of the type described above, as well as cells transformed with such expression vectors. Further disclosed are applications for the compositions described above.

摘要翻译： 这里公开了编码N末端规则途径的识别成分的核酸序列。 该核酸序列的特征在于在严格杂交条件下与SEQ ID NO 1的核酸序列特异性杂交的能力。 这些条件定义如下。 还公开了编码N末端规则通路的识别组分的核酸序列，其特征在于在严格杂交条件下与SEQ ID NO 2的核酸序列特异性杂交的能力。 还公开了含有上述类型的核酸序列的DNA表达载体以及用这种表达载体转化的细胞。 进一步公开的是上述组合物的应用。

公开(公告)号：US20130241042A1

公开(公告)日：2013-09-19

申请号：US13879911

申请日：2011-09-28

申请人： Yong-Tae Kwon

发明人： Yong-Tae Kwon

IPC分类号： H01L23/00

CPC分类号： H01L24/25 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/20 ,  H01L24/82 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/20 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/14511 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/1904 ,  H01L2924/19105

摘要： In one embodiment, a semiconductor chip package includes an insulation frame having an opening part formed in a center thereof and a via hole formed around the opening part; a semiconductor chip disposed cm the opening part; a conductive part filling the via hole; an inner insulation layer formed on bottom surfaces of the semiconductor chip and the insulation frame so as to expose a bottom surface of the conductive part; and an inner signal pattern formed on the inner insulation layer and electrically connecting the semiconductor chip and the conductive part. Embodiments also relate to a semiconductor module including a vertical stack of a plurality of the semiconductor chip packages, and to a method for manufacturing the same.

摘要翻译： 在一个实施例中，半导体芯片封装包括具有形成在其中心的开口部分和围绕开口部分形成的通孔的绝缘框架; 半导体芯片，设置在所述开口部分上; 填充通孔的导电部分; 形成在半导体芯片的底面和绝缘框架上的内绝缘层，以露出导电部件的底面; 以及形成在所述内绝缘层上并且电连接所述半导体芯片和所述导电部件的内部信号图案。 实施例还涉及包括多个半导体芯片封装的垂直堆叠的半导体模块及其制造方法。

公开(公告)号：US20120146216A1

公开(公告)日：2012-06-14

申请号：US13040008

申请日：2011-03-03

申请人： In Soo KANG ,  Yong Tae Kwon ,  Byung Jin PARK

发明人： In Soo KANG ,  Yong Tae Kwon ,  Byung Jin PARK

IPC分类号： H01L23/485 ,  H01L21/50 ,  H01L23/48 ,  H01L21/56

CPC分类号： H01L23/147 ,  H01L21/486 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/16237 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： A semiconductor package is provided. The package includes a package substrate with a first surface and a second surface on the opposite side, and a plurality of via sets connecting vertically the first surface with the second surface, said via sets having a plurality of micro vias and filled with conductive material. The micro vias are grouped together, and the distance between micro vias in the via set is smaller than the distance between neighboring via sets.

摘要翻译： 提供半导体封装。 该封装包括具有第一表面和相对侧上的第二表面的封装基板，以及多个通孔组，其将第一表面与第二表面垂直连接，所述通孔组具有多个微通孔并填充有导电材料。 微孔组合在一起，并且通孔组中的微通孔之间的距离小于相邻通孔组之间的距离。

公开(公告)号：US07575881B2

公开(公告)日：2009-08-18

申请号：US11228157

申请日：2005-09-16

申请人： Rong-Gui Hu ,  Jun Sheng ,  Yong Tae Kwon ,  Anna Kashina ,  Alexander Varshavsky

发明人： Rong-Gui Hu ,  Jun Sheng ,  Yong Tae Kwon ,  Anna Kashina ,  Alexander Varshavsky

IPC分类号： G01N33/53 ,  G01N33/573 ,  C12Q1/48

CPC分类号： C12Q1/48 ,  G01N2333/91074 ,  G01N2333/91188 ,  G01N2500/04

摘要： Screening assays that allow for the identification of agents that modulate the activity of the arginylation branch of the N-end rule pathway are provided. Also provided are method of using an agent that modulate the activity of the arginylation branch of the N-end rule pathway to increase or decrease protein degradation in a cell, and to modulate physiologic and pathologic associated with N-end rule pathway mediated arginylation.

摘要翻译： 提供了允许鉴定调节N端规则途径的精氨酰化分支的活性的筛选测定。 还提供了使用调节N端规则途径的精氨酸分支的活性以增加或减少细胞中的蛋白质降解并调节与N端规则途径介导的精氨酰化相关的生理和病理学的试剂的方法。