公开(公告)号：US10140216B2

公开(公告)日：2018-11-27

申请号：US15002648

申请日：2016-01-21

Applicant: ARM LIMITED

Inventor： Michael John Williams ,  Michael Filippo ,  Hazim Shafi

IPC: G06F12/10 ,  G06F12/1027 ,  G06F3/06 ,  G06F12/1009 ,  G06F11/34

Abstract: An apparatus includes processing circuitry to process instructions, some of which may require addresses to be translated. The apparatus also includes address translation circuitry to translate addresses in response to instruction processed by the processing circuitry. Furthermore, the apparatus also includes translation latency measuring circuitry to measure a latency of at least part of an address translation process performed by the address translation circuitry in response to a given instruction.