公开(公告)号：US20160110202A1

公开(公告)日：2016-04-21

申请号：US14519697

申请日：2014-10-21

Applicant: ARM LIMITED

Inventor： Michael Alan FILIPPO ,  Matthew Paul ELWOOD ,  Umar FAROOQ ,  Adam GEORGE

IPC: G06F9/38

CPC classification number: G06F9/3844 ,  G06F9/3806 ,  G06F9/3848

Abstract: A data processing apparatus 2 contains branch prediction circuitry 10 including a micro branch target buffer 28, a full branch target buffer 30 and a global history buffer 32. The branch target buffer entries 40 contain history data 42, 44 which indicates whether or not a number of the following blocks of program instructions, subsequent to and sequential to a block of program instruction identified by that branch target buffer entry containing a branch instruction, do themselves contain any branch instructions. If the history data 42, 44 indicates that the following blocks of program instructions do not contain branches, then the operation of the branch prediction circuitry 28, 30, 32 is suppressed for these following blocks of program instructions so as to save energy.

Abstract translation: 数据处理装置2包含分支预测电路10，分支预测电路10包括微分支目标缓冲器28，全分支目标缓冲器30和全局历史缓冲器32.分支目标缓冲器条目40包含历史数据42,44，其指示数字 在由包含分支指令的分支目标缓冲器条目标识的程序指令块之后并且与之相连的程序指令的以下程序块本身包含任何分支指令。 如果历史数据42,44指示以下程序指令块不包含分支，则对于这些以下程序指令块来说，分支预测电路28,30,32的操作被抑制以便节省能量。