公开(公告)号：US10963409B2

公开(公告)日：2021-03-30

申请号：US15241461

申请日：2016-08-19

Applicant: ARM Limited

Inventor： Rowan Nigel Naylor ,  Phanindra Kumar Mannava ,  Bruce James Mathewson

IPC: G06F13/362 ,  H04L12/707

Abstract: An interconnect circuit, and method of operation of such an interconnect circuit, are provided. The interconnect circuitry has a first interface for coupling to a master device and a second interface for coupling to a slave device. Transactions are performed between the master device and the slave device, where each transaction comprises or more transfers, and each transfer comprises a request and a response. A first connection path between the first interface and the second interface is provided that comprises a first plurality of pipeline stages. The first connection path forms a default path for propagation of the requests and responses of the transfers. A second connection path is also provided between the first interface and the second interface that comprises a second plurality of pipeline stages, where the second plurality is less than the first plurality. Path selection circuitry is then used to determine presence of a fast path condition. In the presence of the fast path condition, the path selection circuitry causes at least one of the request and the response for one or more transfers to be propagated via the second connection path. This can significantly reduce the latency associated with the handling of transfers within the interconnect circuitry, and hence improves the overall performance of the interconnect circuitry.