Interpolation and decimation using newton polyphase filters
    1.
    发明申请
    Interpolation and decimation using newton polyphase filters 有权
    使用牛顿多相滤波器进行插值和抽取

    公开(公告)号:US20060224649A1

    公开(公告)日:2006-10-05

    申请号:US11095244

    申请日:2005-03-30

    CPC classification number: H03H17/0275 H03H17/0657 H03H17/0664

    Abstract: An interpolation filter for interpolating a digital signal includes a cascade of template filters, each having an identical template transfer function A(z), which is arranged to receive and filter an input sequence representing the digital signal sampled at an input sampling rate. Ancillary circuitry is coupled to the cascade so as to produce first and second phase outputs. A multiplexer is arranged to multiplex the phase outputs in order to generate an output sequence having an output sampling rate equal to twice the input sampling rate.

    Abstract translation: 用于内插数字信号的内插滤波器包括级联的模板滤波器,每个模板滤波器具有相同的模板传递函数A(z),其被布置为接收和滤波表示以输入采样率采样的数字信号的输入序列。 辅助电路耦合到级联,以便产生第一和第二相输出。 多路复用器被布置为复用相位输出,以便产生具有等于输入采样率的两倍的输出采样率的输出序列。

    Interpolation and decimation using newton polyphase filters
    2.
    发明授权
    Interpolation and decimation using newton polyphase filters 有权
    使用牛顿多相滤波器进行插值和抽取

    公开(公告)号:US07680869B2

    公开(公告)日:2010-03-16

    申请号:US11095244

    申请日:2005-03-30

    CPC classification number: H03H17/0275 H03H17/0657 H03H17/0664

    Abstract: An interpolation filter for interpolating a digital signal includes a cascade of template filters, each having an identical template transfer function A(z), which is arranged to receive and filter an input sequence representing the digital signal sampled at an input sampling rate. Ancillary circuitry is coupled to the cascade so as to produce first and second phase outputs. A multiplexer is arranged to multiplex the phase outputs in order to generate an output sequence having an output sampling rate equal to twice the input sampling rate.

    Abstract translation: 用于内插数字信号的内插滤波器包括级联的模板滤波器,每个模板滤波器具有相同的模板传递函数A(z),其被布置为接收和滤波表示以输入采样率采样的数字信号的输入序列。 辅助电路耦合到级联,以便产生第一和第二相输出。 多路复用器被布置为复用相位输出,以便产生具有等于输入采样率的两倍的输出采样率的输出序列。

    Method of mask calculation for generation of shifted pseudo-noise (PN) sequence
    3.
    发明授权
    Method of mask calculation for generation of shifted pseudo-noise (PN) sequence 失效
    用于生成移位伪噪声(PN)序列的掩码计算方法

    公开(公告)号:US06526427B1

    公开(公告)日:2003-02-25

    申请号:US09455001

    申请日:1999-12-06

    CPC classification number: G06F7/724 G06F7/584 G06F2207/582

    Abstract: A method for calculating the mask for an arbitrary delay of a pseudo-noise sequence uses only XOR operations on previously calculated masks. A method for calculating the mask for an arbitrary delay of a pseudo-noise sequence whose shift register polynomial is of order R uses no more than NOP operations where NOP is independent of the delay and NOP is on the order of R.

    Abstract translation: 用于计算伪噪声序列的任意延迟的掩模的方法仅对先前计算的掩模使用XOR运算。 用于计算移位寄存器多项式为阶数R的伪噪声序列的任意延迟的掩模的方法不仅使用NOP与延迟无关的NOP操作,并且NOP在R的量级上。

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