公开(公告)号：US09753695B2

公开(公告)日：2017-09-05

申请号：US14010946

申请日：2013-08-27

Applicant: Analog Devices Global

Inventor： Mikael M. Mortensen ,  Jeffrey G. Bernstein

IPC: G06F7/38 ,  G06F7/60 ,  G06F7/57 ,  G06F1/035

CPC classification number: G06F7/60 ,  G06F1/035 ,  G06F7/57 ,  G06F2101/08 ,  G06F2101/10

Abstract: A datapath circuit may include a digital multiply and accumulate circuit (MAC) and a digital hardware calculator for parallel computation. The digital hardware calculator and the MAC may be coupled to an input memory element for receipt of input operands. The MAC may include a digital multiplier structure with partial product generators coupled to an adder to multiply a first and second input operands and generate a multiplication result. The digital hardware calculator may include a first look-up table coupled between a calculator input and a calculator output register. The first look-up table may include table entry values mapped to corresponding math function results in accordance with a first predetermined mathematical function. The digital hardware calculator may be configured to calculate, based on the first look-up table, a computationally hard mathematical function such as a logarithm function, an exponential function, a division function and a square root function.