公开(公告)号：US09531262B2

公开(公告)日：2016-12-27

申请号：US14147228

申请日：2014-01-03

Applicant: Analog Devices Technology

Inventor： Roger Peppiette ,  Yanfeng Lu ,  Bin Shao ,  Linus Sheng

IPC: G05F1/10 ,  G05F3/02 ,  H02M3/07

CPC classification number: H02M3/073

Abstract: This application discusses, among other things apparatus and methods for a voltage boost circuit. In an example, a voltage boost circuit can include first and second inverters, sharing a first supply node, and sharing a second supply node, a first charge transfer capacitor, configured to couple a first clock signal to the first inverter output, a second charge transfer capacitor, configured to couple a second clock signal to the second inverter output, the second clock signal being out-of-phase with the first clock signal, a first gate drive capacitor, configured to couple the first clock signal to the second inverter input, and a second gate drive capacitor, configured to couple the second clock signal to the first inverter input.

Abstract translation: 本应用程序还讨论了升压电路的设备和方法。 在一个示例中，升压电路可以包括第一和第二反相器，共享第一电源节点，并共享第二电源节点，第一电荷转移电容器，被配置为将第一时钟信号耦合到第一反相器输出;第二充电 转移电容器，被配置为将第二时钟信号耦合到第二反相器输出，第二时钟信号与第一时钟信号异相;第一栅极驱动电容器，被配置为将第一时钟信号耦合到第二反相器输入 以及第二栅极驱动电容器，被配置为将所述第二时钟信号耦合到所述第一反相器输入。

公开(公告)号：US20150194879A1

公开(公告)日：2015-07-09

申请号：US14147228

申请日：2014-01-03

Applicant: Analog Devices Technology

Inventor： Roger Peppiette ,  Yanfeng Lu ,  Bin Shao ,  Linus Sheng

IPC: H02M3/07

CPC classification number: H02M3/073

Abstract: This application discusses, among other things apparatus and methods for a voltage boost circuit. In an example, a voltage boost circuit can include first and second inverters, sharing a first supply node, and sharing a second supply node, a first charge transfer capacitor, configured to couple a first clock signal to the first inverter output, a second charge transfer capacitor, configured to couple a second clock signal to the second inverter output, the second clock signal being out-of-phase with the first clock signal, a first gate drive capacitor, configured to couple the first clock signal to the second inverter input, and a second gate drive capacitor, configured to couple the second clock signal to the first inverter input.

Abstract translation: 本应用程序还讨论了升压电路的设备和方法。 在一个示例中，升压电路可以包括第一和第二反相器，共享第一电源节点，并共享第二电源节点，第一电荷转移电容器，被配置为将第一时钟信号耦合到第一反相器输出;第二充电 转移电容器，被配置为将第二时钟信号耦合到第二反相器输出，第二时钟信号与第一时钟信号异相;第一栅极驱动电容器，被配置为将第一时钟信号耦合到第二反相器输入 以及第二栅极驱动电容器，被配置为将所述第二时钟信号耦合到所述第一反相器输入。