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公开(公告)号：US20180315160A1
公开(公告)日：2018-11-01
申请号：US15967462
申请日：2018-04-30
Applicant: Apple Inc.
Inventor： Aaron M. Ballow , Kenneth I. Greenebaum
CPC classification number: G06T1/20 , G06F9/3873
Abstract: The present disclosure describes techniques for removing unnecessary processing stages from a graphics processing pipeline based on the format of data passed between the stages. Starting with a stage at a middle point in a pipeline, formats of data that are input to and output from the middle stage may be compared to each other. If the formats match, the middle stage may be removed from the pipeline. Thereafter, the format of data input to a pair of middle stages of the pipeline and output from the pipeline may be compared and, if they match, the middle pair may be deleted. This process may repeat until a middle pair is found where no match occurs between the input and output format. The remaining stages of the pipeline may be retained. In cases where a pipeline is not symmetrical, the formats of data at each node may be compared to each other. If a node possesses a format that does not match the format of any other node, then the stages between the node and its closest endpoint in the pipeline may be retained.
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公开(公告)号：US10600143B2
公开(公告)日：2020-03-24
申请号：US15967462
申请日：2018-04-30
Applicant: Apple Inc.
Inventor： Aaron M. Ballow , Kenneth I. Greenebaum
Abstract: The present disclosure describes techniques for removing unnecessary processing stages from a graphics processing pipeline based on the format of data passed between the stages. Starting with a stage at a middle point in a pipeline, formats of data that are input to and output from the middle stage may be compared to each other. If the formats match, the middle stage may be removed from the pipeline. Thereafter, the format of data input to a pair of middle stages of the pipeline and output from the pipeline may be compared and, if they match, the middle pair may be deleted. This process may repeat until a middle pair is found where no match occurs between the input and output format. The remaining stages of the pipeline may be retained. In cases where a pipeline is not symmetrical, the formats of data at each node may be compared to each other. If a node possesses a format that does not match the format of any other node, then the stages between the node and its closest endpoint in the pipeline may be retained.
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公开(公告)号：US09984434B1
公开(公告)日：2018-05-29
申请号：US15274960
申请日：2016-09-23
Applicant: Apple Inc.
Inventor： Aaron M. Ballow , Kenneth I. Greenebaum
CPC classification number: G06T1/20 , G06F9/3873
Abstract: The present disclosure describes techniques for removing unnecessary processing stages from a graphics processing pipeline based on the format of data passed between the stages. Starting with a stage at a middle point in a pipeline, formats of data that are input to and output from the middle stage may be compared to each other. If the formats match, the middle stage may be removed from the pipeline. Thereafter, the format of data input to a pair of middle stages of the pipeline and output from the pipeline may be compared and, if they match, the middle pair may be deleted. This process may repeat until a middle pair is found where no match occurs between the input and output format. The remaining stages of the pipeline may be retained. In cases where a pipeline is not symmetrical, the formats of data at each node may be compared to each other. If a node possesses a format that does not match the format of any other node, then the stages between the node and its closest endpoint in the pipeline may be retained.
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