公开(公告)号：US20230205537A1

公开(公告)日：2023-06-29

申请号：US17560643

申请日：2021-12-23

Applicant: Arm Limited

Inventor： Adrian Viorel POPESCU ,  Remus-Gabriel VULTUR ,  Jatin BHARTIA

IPC: G06F9/38

CPC classification number: G06F9/382 ,  G06F9/3802

Abstract: Aspects of the present disclosure relate to an apparatus comprising fetch circuitry. The fetch circuitry comprises a pointer-based fetch queue for queuing processing instructions retrieved from a storage, and pointer storage for storing a pointer identifying a current fetch queue element. The apparatus comprises decode circuitry having a plurality of decode units, and fetch queue extraction circuitry to, based on the pointer, extract the content of a plurality of elements of the fetch queue; apply combinatorial logic to speculatively produce, from the content of said fetch queue entries, a plurality of speculative potential instructions; and transmit each speculative potential instruction to a corresponding one of said decode units. Each decode unit is configured to decode the corresponding speculative potential instruction. The instruction extraction circuitry is configured to extract a subset of said plurality of speculative potential instructions, and transmit said determined subset to pipeline component circuitry.