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公开(公告)号：US20250111465A1
公开(公告)日：2025-04-03
申请号：US18478657
申请日：2023-09-29
Applicant: Arm Limited
Inventor： Olof Henrik Uhrenholt , Thomas Weber
IPC: G06T1/20
Abstract: A method of managing write-after-read (WAR) hazards in a graphics processor. A host processor when preparing a graphics processor command stream can identify possible WAR hazards between rendering jobs for example by detecting layout transitions and insert a suitable barrier into the graphics processor command stream. The graphics processor when encountering such a barrier can then determine whether it is possible to ignore the barrier and allow rendering jobs to be processed concurrently.
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