Managing integrity of framed payloads using redundant signals

    公开(公告)号:US09680606B2

    公开(公告)日:2017-06-13

    申请号:US14948203

    申请日:2015-11-20

    Abstract: A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network.

    MANAGING INTEGRITY OF FRAMED PAYLOADS USING REDUNDANT SIGNALS

    公开(公告)号:US20200099470A1

    公开(公告)日:2020-03-26

    申请号:US16698126

    申请日:2019-11-27

    Abstract: A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network.

    MANAGING INTEGRITY OF FRAMED PAYLOADS USING REDUNDANT SIGNALS

    公开(公告)号:US20190052402A1

    公开(公告)日:2019-02-14

    申请号:US16162283

    申请日:2018-10-16

    Abstract: A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network.

    MANAGING INTEGRITY OF FRAMED PAYLOADS USING REDUNDANT SIGNALS

    公开(公告)号:US20170346600A1

    公开(公告)日:2017-11-30

    申请号:US15622039

    申请日:2017-06-13

    Abstract: A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network.

    MANAGING INTEGRITY OF FRAMED PAYLOADS USING REDUNDANT SIGNALS
    5.
    发明申请
    MANAGING INTEGRITY OF FRAMED PAYLOADS USING REDUNDANT SIGNALS 有权
    使用冗余信号管理框架式货物的完整性

    公开(公告)号:US20160147595A1

    公开(公告)日:2016-05-26

    申请号:US14948203

    申请日:2015-11-20

    Abstract: A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network.

    Abstract translation: 作为分集通信方案的一部分,帧错误校正电路可以识别和校正提供给接收机的数据帧中的错误。 帧错误校正电路还可以对准数据帧,使得可以比较数据帧。 帧错误校正电路可以执行数据帧的逐位比较,并且识别数据帧中的比特彼此不同的不一致比特位置。 一旦识别出不一致的位位置,则帧错误校正电路可以访问不一致比特位置的比特排列置换表。 在一些实现中,帧错误校正电路使用置换表重新组合数据帧的排列。 在各种实现中,帧错误校正电路执行数据帧的每次置换的CRC,并向网络提供有效的置换。

    Managing integrity of framed payloads using redundant signals

    公开(公告)号:US10103842B2

    公开(公告)日:2018-10-16

    申请号:US15622039

    申请日:2017-06-13

    Abstract: A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network.

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