公开(公告)号：USD748627S1

公开(公告)日：2016-02-02

申请号：US29496228

申请日：2014-07-10

Applicant: BAE Systems Information And Electronic Systems Integration Inc.

Designer： Andrew R. Russette ,  Aaron R. Oberste ,  Alexa D. Oberste ,  Anthony P. Antoniades ,  Matthew F. Guenette

公开(公告)号：USD748093S1

公开(公告)日：2016-01-26

申请号：US29496221

申请日：2014-07-10

Applicant: BAE Systems Information And Electronic Systems Integration Inc.

Designer： Andrew R. Russette ,  Aaron R. Oberste ,  Alexa D. Oberste

公开(公告)号：US09671836B2

公开(公告)日：2017-06-06

申请号：US14425397

申请日：2014-07-10

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Andrew R. Russette ,  Aaron Oberste ,  Alexa D. Oberste ,  Anthony P. Antoniades ,  Matthew F. Guenette

IPC: G06F1/16 ,  H05K5/00 ,  H05K7/00 ,  G06F1/18 ,  G11B33/12 ,  G11B33/14 ,  G06F3/06

CPC classification number: G06F1/187 ,  G06F1/181 ,  G06F3/0658 ,  G06F3/0689 ,  G11B33/128 ,  G11B33/142 ,  Y10T29/49169

Abstract: A memory system includes c-shell units, PCBs, and a controller logic. The c-shell units are positioned side-by-side adjacent each other. Each c-shell unit has at least two sled-less memory bays and the sled-less memory bays are positioned vertically relative to each other. Each of the sled-less memory bays receives a memory device. A PCB is vertically mounted to a corresponding c-shell unit. The control logic controls access to and from the memory devices so that it manages storing data to the memory devices and retrieving data from the memory devices. Each PCB comprises traces to route signals between the control logic and the memory devices.

公开(公告)号：USD748638S1

公开(公告)日：2016-02-02

申请号：US29496233

申请日：2014-07-10

Applicant: BAE Systems Information And Electronic Systems Integration Inc.

Designer： Andrew R. Russette ,  Aaron R. Oberste ,  Alexa D. Oberste ,  Anthony P. Antoniades ,  Matthew F. Guenette

公开(公告)号：USD765087S1

公开(公告)日：2016-08-30

申请号：US29540333

申请日：2015-09-23

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Designer： Andrew R. Russette ,  Aaron Oberste ,  Alexa D. Oberste ,  Anthony P. Antoniades ,  Matthew F. Guenette

公开(公告)号：US20150227179A1

公开(公告)日：2015-08-13

申请号：US14425397

申请日：2014-07-10

Applicant: BAE Systems Information and Electronic Systems Integration Inc.

Inventor： Andrew R. Russette ,  Aaron Oberste ,  Alexa D. Oberste ,  Anthony P. Antoniades ,  Matthew F. Guenette

IPC: G06F1/18

CPC classification number: G06F1/187 ,  G06F1/181 ,  G06F3/0658 ,  G06F3/0689 ,  G11B33/128 ,  G11B33/142 ,  Y10T29/49169

Abstract: A memory system includes c-shell units, PCBs, and a controller logic. The c-shell units are positioned side-by-side adjacent each other. Each c-shell unit has at least two sled-less memory bays and the sled-less memory bays are positioned vertically relative to each other. Each of the sled-less memory bays receives a memory device. A PCB is vertically mounted to a corresponding c-shell unit. The control logic controls access to and from the memory devices so that it manages storing data to the memory devices and retrieving data from the memory devices. Each PCB comprises traces to route signals between the control logic and the memory devices.

Abstract translation: 存储器系统包括c-shell单元，PCB和控制器逻辑。 c壳单元彼此并排定位。 每个c-shell单元具有至少两个无雪橇的存储器托架，并且所述无滑轨的存储器托架相对于彼此垂直定位。 每个无雪橇存储器托架接收存储器件。 PCB垂直安装到相应的c-shell单元上。 控制逻辑控制对存储设备的访问，以便它管理将数据存储到存储器设备并从存储器设备检索数据。 每个PCB包括用于在控制逻辑和存储器件之间路由信号的迹线。