FRONT-END SIGNAL GENERATOR FOR HARDWARE IN-THE-LOOP SIMULATION
    1.
    发明申请
    FRONT-END SIGNAL GENERATOR FOR HARDWARE IN-THE-LOOP SIMULATION 审中-公开
    用于硬件在环模拟的前端信号发生器

    公开(公告)号:US20140222397A1

    公开(公告)日:2014-08-07

    申请号:US13961919

    申请日:2013-08-08

    CPC classification number: G06F17/5036 G06F2217/86

    Abstract: A front-end signal generator for hardware-in-the-loop simulators of a simulated missile is disclosed. The front-end signal generator is driven by the Digital Scene And Reticle Simulation-Hardware In The Loop (DSARS-HITL) simulator. The simulator utilizes a computer to calculate irradiance on an Electro-Optical/Infrared (EO/IR) detector. The generator converts irradiance values into voltages that are injected into the missile's electronics during simulation. The conversion is done with low latency and a high dynamic range sufficient for hardware-in-the-loop simulation. The generator is capable of emulating laser pulse inputs that would be present during laser-based jammer countermeasures. Computer control of the generator occurs via front-panel-data-port (FPDP).

    Abstract translation: 公开了一种用于模拟导弹的硬件在环仿真器的前端信号发生器。 前端信号发生器由数字场景和光栅模拟 - 硬件循环(DSARS-HITL)模拟器驱动。 模拟器利用电脑计算电光/红外(EO / IR)检测器的辐照度。 发电机将辐照值转换成在模拟期间注入到导弹的电子装置中的电压。 该转换以低延迟和高动态范围完成,足以进行硬件在环仿真。 该发生器能够模拟在基于激光的干扰对策中将存在的激光脉冲输入。 发生器的计算机控制通过前面板数据端口(FPDP)进行。

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