Coincident tracking turn-on for mixed voltage logic
    1.
    发明授权
    Coincident tracking turn-on for mixed voltage logic 有权
    混合电压逻辑的并联跟踪开启

    公开(公告)号:US08994434B2

    公开(公告)日:2015-03-31

    申请号:US13765094

    申请日:2013-02-12

    CPC classification number: H03K17/08104

    Abstract: A method for dealing with high inrush current when voltage is applied to mixed voltage logic integrated circuits is disclosed. A depletion N-Channel Metal Oxide Semiconductor Field Effect Transistor (MOSFET) or junction Field Effect Transistor (JFET) is added to a linear voltage regulator in mixed voltage logic integrated circuits. The Field Effect Transistor (FET) is utilized to allow the core voltage to come up with Input/Output voltage prior to turn-on of linear voltage regulator. Turn-on state of FET allows the core voltage to rise with Input/Output voltage until the FET threshold is reached across the gate. When threshold is reached, the FET turns off to allow linear voltage regulator turn on and take over supply power.

    Abstract translation: 公开了一种在混合电压逻辑集成电路施加电压时处理高浪涌电流的方法。 耗尽N沟道金属氧化物半导体场效应晶体管(MOSFET)或结场场效应晶体管(JFET)被添加到混合电压逻辑集成电路中的线性稳压器。 场效应晶体管(FET)用于允许核心电压在线性稳压器导通之前提供输入/输出电压。 FET的导通状态允许核心电压随着输入/输出电压而升高,直到门极达到FET阈值。 当达到阈值时,FET关闭,允许线性稳压器接通并接管电源。

    Coincident Tracking Turn-On For Mixed Voltage Logic
    2.
    发明申请
    Coincident Tracking Turn-On For Mixed Voltage Logic 有权
    混合电压逻辑的并联跟踪开启

    公开(公告)号:US20130207713A1

    公开(公告)日:2013-08-15

    申请号:US13765094

    申请日:2013-02-12

    CPC classification number: H03K17/08104

    Abstract: A method for dealing with high inrush current when voltage is applied to mixed voltage logic integrated circuits is disclosed. A depletion N-Channel Metal Oxide Semiconductor Field Effect Transistor (MOSFET) or junction Field Effect Transistor (JFET) is added to a linear voltage regulator in mixed voltage logic integrated circuits. The Field Effect Transistor (FET) is utilized to allow the core voltage to come up with Input/Output voltage prior to turn-on of linear voltage regulator. Turn-on state of FET allows the core voltage to rise with Input/Output voltage until the FET threshold is reached across the gate. When threshold is reached, the FET turns off to allow linear voltage regulator turn on and take over supply power.

    Abstract translation: 公开了一种在混合电压逻辑集成电路施加电压时处理高浪涌电流的方法。 耗尽N沟道金属氧化物半导体场效应晶体管(MOSFET)或结场场效应晶体管(JFET)被添加到混合电压逻辑集成电路中的线性稳压器。 场效应晶体管(FET)用于允许核心电压在线性稳压器导通之前提供输入/输出电压。 FET的导通状态允许核心电压随着输入/输出电压而升高,直到门极达到FET阈值。 当达到阈值时,FET关闭,允许线性稳压器接通并接管电源。

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