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公开(公告)号:US5404318A
公开(公告)日:1995-04-04
申请号:US983779
申请日:1992-12-01
摘要: A test mode read back function for verifying the functions of the memory display interface and a VRAM frame buffer coupled to the memory display interface, wherein the memory display interface implements programmable pixel rates and pixel depths, and programmable pixel processing functions.
摘要翻译: 一种用于验证存储器显示接口和耦合到存储器显示接口的VRAM帧缓冲器的功能的测试模式回读功能,其中存储器显示接口实现可编程像素速率和像素深度以及可编程像素处理功能。