公开(公告)号：US20040135608A1

公开(公告)日：2004-07-15

申请号：US10200824

申请日：2002-07-22

Applicant: Cirrus Logic, Inc.

Inventor： Sanjay Pillay ,  Khoi Mai ,  Luo Zheng ,  Dimitri Pantelakis

IPC: H03K003/017

CPC classification number: H03K5/1565

Abstract: A signal generator generates an output signal with a programmable duty cycle and includes a first buffer which generates in response to an input signal an intermediate signal having a selected edge with a voltage slope selected to vary a length of a selected phase of the output signal. A second buffer having a selected input voltage threshold generates the output signal in response to the intermediate signal.

Abstract translation: 信号发生器产生具有可编程占空比的输出信号，并且包括第一缓冲器，其响应于输入信号产生具有选择的边沿的中间信号，所述边沿具有选择的电压斜率以改变输出信号的选定相位的长度。 具有选择的输入电压阈值的第二缓冲器响应于中间信号产生输出信号。