公开(公告)号：US07594098B2

公开(公告)日：2009-09-22

申请号：US11480781

申请日：2006-06-30

Applicant: Didier Fuin

Inventor： Didier Fuin

IPC: G06F9/30 ,  G06F9/00 ,  G06F9/45 ,  G06F17/00

CPC classification number: H03M7/30 ,  G06F8/4434 ,  Y10S707/99942

Abstract: An embodiment of the invention relates to a process for compression of executable code by a microprocessor, comprising decomposing the executable code into words; dividing the executable code into instruction lines; compressing each word of each line in the form of a compressed word of variable length, the compressed words of a line being combined into a line of compressed words; and constituting an addressing table localizing each of the lines of compressed words in a block of lines compressed words and comprising one input per group of lines of compressed words, each input (j) specifying the position of a first line of compressed words in the block, and the respective lengths of the lines of compressed words of group, except for a last line of compressed words of the group, whereof the length is determined by means of the position of a first line of compressed words of a following group.

Abstract translation: 本发明的实施例涉及一种由微处理器压缩可执行代码的过程，包括将可执行代码分解为单词; 将可执行代码分成指令行; 以可变长度的压缩字的形式压缩每行的每个字，一行的压缩字组合成一行压缩字; 并且构成一个寻址表，其将一行压缩字中的压缩字的每一行定位，并且每组压缩字组包括一个输入，每个输入（j）指定块中第一行压缩字的位置 ，以及组中的压缩字的行的各自的长度，除了该组的最后一行压缩字，其长度通过下一组的压缩字的第一行的位置来确定。

公开(公告)号：US20080256332A1

公开(公告)日：2008-10-16

申请号：US11480769

申请日：2006-06-30

Applicant: Didier Fuin

Inventor： Didier Fuin

IPC: G06F9/46

CPC classification number: H03M7/30 ,  G06F8/4434 ,  Y10S707/99942

Abstract: The invention relates to a process for compression of executable code (2) by a microprocessor, comprising steps consisting of decomposing the executable code into words; compressing each word of executable code, each compressed word of executable code comprising a part (BC) of predefined fixed length and a part (VLI) of variable length whereof the length is defined by the part of fixed length; and combining all the parts of fixed length and all the parts of variable length of the words respectively into a block of parts of fixed length and in a block (12) of parts of variable length, the respective positions of at least certain parts of variable length in the block of parts of variable length being saved in an addressing table (13).

Abstract translation: 本发明涉及一种由微处理器压缩可执行代码（2）的过程，包括将可执行代码分解为单词的步骤; 压缩可执行代码的每个字，每个可执行代码的压缩字包括预定义固定长度的部分（BC）和可变长度的部分（VLI），其长度由固定长度的一部分定义; 将所述单词的固定长度的所有部分和所述单词的可变长度的所有部分分别组合成固定长度的部分块和可变长度部分的块（12）中，可变长度的至少一部分的各自位置 可变长度部分块中的长度保存在寻址表（13）中。

公开(公告)号：US06321248B1

公开(公告)日：2001-11-20

申请号：US09206000

申请日：1998-12-04

Applicant: Claire Bonnet ,  Sébastien Ferroussat ,  Didier Fuin

Inventor： Claire Bonnet ,  Sébastien Ferroussat ,  Didier Fuin

IPC: G06F738

CPC classification number: G06F7/506 ,  G06F7/4991 ,  G06F7/49921

Abstract: A process is for determining an overflow to the format of the result of an arithmetic operation carried out by an arithmetic unit on two operands A and B and an input carry digit Cin. This process is executed in parallel to the processing done by the AU on operands A and B, before the AU has determined the result S of the operation.

Abstract translation: 一个处理是确定一个溢出到由运算单元在两个操作数A和B以及输入进位数字Cin上执行的算术运算结果的格式。 在AU确定操作的结果S之前，该操作与AU在操作数A和B上执行的处理并行执行。

公开(公告)号：US07616137B2

公开(公告)日：2009-11-10

申请号：US11480769

申请日：2006-06-30

Applicant: Didier Fuin

Inventor： Didier Fuin

IPC: H03M7/00

CPC classification number: H03M7/30 ,  G06F8/4434 ,  Y10S707/99942

Abstract: An embodiment of the invention relates to a process for compression of executable code by a microprocessor, comprising steps consisting of decomposing the executable code into words; compressing each word of executable code, each compressed word of executable code comprising a part of predefined fixed length and a part of variable length whereof the length is defined by the part of fixed length; and combining all the parts of fixed length and all the parts of variable length of the words respectively into a block of parts of fixed length and in a block of parts of variable length, the respective positions of at least certain parts of variable length in the block of parts of variable length being saved in an addressing table.

Abstract translation: 本发明的一个实施例涉及一种由微处理器压缩可执行代码的过程，包括将可执行代码分解为单词的步骤; 压缩可执行代码的每个字，每个可执行代码的压缩字包括预定义的固定长度的一部分和长度可变长度的一部分，其长度由固定长度的一部分定义; 并将字长可变长度的所有部分和所有可变长度的部分分别组合成固定长度部分的块和可变长度部分的块中，可变长度的至少某些部分的位置在 可变长度部分的块被保存在寻址表中。

公开(公告)号：US06564303B1

公开(公告)日：2003-05-13

申请号：US09217370

申请日：1998-12-21

Applicant: Didier Fuin ,  Joël Curtet ,  Fabrice Devaux

Inventor： Didier Fuin ,  Joël Curtet ,  Fabrice Devaux

IPC: G06F1200

CPC classification number: G11C29/74 ,  G11C7/00 ,  G11C8/00

Abstract: The present invention relates to a data processing system comprising a processor provided with two memory access units operating in parallel; two separate memories respectively associated with the two access units; and circuitry for, when the address of a datum to be written into a memory is in a predetermined address range, writing the datum into both memories at the same time at the same address.

Abstract translation: 数据处理系统技术领域本发明涉及一种数据处理系统，包括：处理器，其具有并行操作的两个存储器访问单元; 分别与两个访问单元相关联的两个独立的存储器; 以及当要写入存储器的数据的地址处于预定的地址范围时，同时在同一地址将数据同时写入两个存储器的电路。

公开(公告)号：US20070174588A1

公开(公告)日：2007-07-26

申请号：US11480781

申请日：2006-06-30

Applicant: Didier Fuin

Inventor： Didier Fuin

IPC: G06F9/40

CPC classification number: H03M7/30 ,  G06F8/4434 ,  Y10S707/99942

Abstract: An embodiment of the invention relates to a process for compression of executable code by a microprocessor, comprising decomposing the executable code into words; dividing the executable code into instruction lines; compressing each word of each line in the form of a compressed word of variable length, the compressed words of a line being combined into a line of compressed words; and constituting an addressing table localizing each of the lines of compressed words in a block of lines compressed words and comprising one input per group of lines of compressed words, each input (j) specifying the position of a first line of compressed words in the block, and the respective lengths of the lines of compressed words of group, except for a last line of compressed words of the group, whereof the length is determined by means of the position of a first line of compressed words of a following group.

Abstract translation: 本发明的实施例涉及一种由微处理器压缩可执行代码的过程，包括将可执行代码分解为单词; 将可执行代码分成指令行; 以可变长度的压缩字的形式压缩每行的每个字，一行的压缩字组合成一行压缩字; 并且构成一个寻址表，其将一行压缩字中的压缩字的每一行定位，并且每组压缩字组包括一个输入，每个输入（j）指定块中第一行压缩字的位置 ，以及组中的压缩字的行的各自的长度，除了该组的最后一行压缩字，其长度通过下一组的压缩字的第一行的位置来确定。

公开(公告)号：US06564309B1

公开(公告)日：2003-05-13

申请号：US09287597

申请日：1999-04-06

Applicant: Didier Fuin

Inventor： Didier Fuin

IPC: G06F1200

CPC classification number: G06F9/30043 ,  G06F9/3824 ,  G06F9/3885

Abstract: The present invention relates to a processor including at least one memory access unit for presenting a read or write address over an address bus of a memory in response to the execution of a read or write instruction; and an arithmetic and logic unit operating in parallel with the memory access unit and arranged at least to present data on the data bus of the memory while the memory access unit presents a write address. The processor includes a write address queue in which is stored each write address provided by the memory access unit waiting for the availability of the data to be written.

Abstract translation: 本发明涉及一种包括至少一个存储器访问单元的处理器，用于响应于读或写指令的执行，在存储器的地址总线上呈现读或写地址; 以及算术和逻辑单元，与所述存储器访问单元并行操作，并且至少在存储器访问单元呈现写入地址时至少在存储器的数据总线上呈现数据。 处理器包括写入地址队列，其中存储由存储器访问单元提供的每个写入地址等待要写入的数据的可用性。