公开(公告)号：US20080177918A1

公开(公告)日：2008-07-24

申请号：US11767546

申请日：2007-06-25

Applicant: Dong-soo LEE ,  Ki-mo KIM

Inventor： Dong-soo LEE ,  Ki-mo KIM

IPC: G06F13/00

CPC classification number: G06F13/4291

Abstract: A method and apparatus for controlling the timing of a state transition of a serial data line (SDA) in an I2C controller are provided. The apparatus includes a processor, a serial clock line (SCL) edge detector, a counter, and an SDA generator. The processor controls an I2C controller. The SCL edge detector detects an edge of a clock signal of an SCL. The counter counts a hold time of the state transition of the SDA if a falling edge of the clock signal of the SCL is detected by the SCL edge detector. The SDA generator transits the state of the SDA if the count of the hold time is finished. Therefore, a malfunction in an I2C communication can be prevented without using a compensation circuit requiring a lot of time and cost.

Abstract translation: 提供了一种用于控制I2C控制器中的串行数据线（SDA）的状态转换的定时的方法和装置。 该装置包括处理器，串行时钟线（SCL）边缘检测器，计数器和SDA发生器。 处理器控制I2C控制器。 SCL边沿检测器检测到SCL的时钟信号的边沿。 如果SCL边沿检测器检测到SCL的时钟信号的下降沿，则计数器计数SDA的状态转换的保持时间。 如果保持时间的计数结束，SDA生成器将转换SDA的状态。 因此，可以防止I2C通信中的故障，而无需使用需要大量时间和成本的补偿电路。