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公开(公告)号:US20210004666A1
公开(公告)日:2021-01-07
申请号:US16894276
申请日:2020-06-05
Inventor: Yong-Joo KIM , Tae-Ho KIM , Eun-Ji PAK , Young-Mok HA
Abstract: Disclosed herein are a neural network generation method for neuromorphic computing and an apparatus for the same. The neural network generation method for neuromorphic computing includes selecting at least one part of a brain corresponding to a neural network function requested to be generated by an application, determining whether an existing neural network corresponding to the at least one part of the brain is present in a neural network database, when it is determined that no existing neural network is present in the neural network database, generating new neural network configuration information corresponding to the part of the brain based on a brain information database, generating a new neural network by mapping the new neural network configuration information to neuromorphic hardware based on the new neural network configuration information, and storing the new neural network in the neural network database.
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2.
公开(公告)号:US20250077261A1
公开(公告)日:2025-03-06
申请号:US18746307
申请日:2024-06-18
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE , AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
Inventor: Tae-Hoon KIM , Kwang-Won KOH , Chang-Dae KIM , Eun-Ji PAK , Yeon-Jeong JEONG , Sang-Hoon KIM
Abstract: Disclosed herein is a method for improving performance of a hypervisor in a memory disaggregation environment. The method includes allocating memory pages to a virtual machine in preset units, comparing the address range of the page frame to be returned with a preset page size, and removing an address space mapping for the page frame to be returned depending on a result of comparison with the preset page size. Removing the address space mapping comprises removing the address space mapping on the basis of contiguous page frames when the range of the page frame to be returned is equal to or greater than the preset page size.
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3.
公开(公告)号:US20250165151A1
公开(公告)日:2025-05-22
申请号:US18950435
申请日:2024-11-18
Inventor: Chang-Dae KIM , Kwang-Won KOH , Tae-Hoon KIM , Eun-Ji PAK , Yeon-Jeong JEONG
IPC: G06F3/06
Abstract: Disclosed herein are an apparatus and method for managing a disaggregated memory based on memory access pattern recognition. The apparatus and method for managing a disaggregated memory based on memory access pattern recognition includes memory configured to store at least one program, and a processor configured to execute the program, wherein the program is configured to recognize a pattern of memory access to a disaggregated memory including a local memory and a remote memory of an application or a container and manage the disaggregated memory based on the recognized memory access pattern, and recognize memory access patterns for respective memory areas managed by at least one virtual memory area descriptor when the memory access pattern is recognized.
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公开(公告)号:US20250077340A1
公开(公告)日:2025-03-06
申请号:US18787138
申请日:2024-07-29
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE , AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
Inventor: Tae-Hoon KIM , Kwang-Won KOH , Chang-Dae KIM , Eun-Ji PAK , Yeon-Jeong JEONG , Sang-Hoon KIM
Abstract: Disclosed herein is a method for managing memory in a memory disaggregation environment. The method includes handling a required subblock within a block more preferentially than an additional block in the event of a page fault and handling a page fault for the block in which the required subblock is preferentially processed.
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