公开(公告)号：US20250124318A1

公开(公告)日：2025-04-17

申请号：US18627870

申请日：2024-04-05

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Jong-Heon LEE

IPC: G06N10/20

Abstract: Disclosed herein are a method for decomposing a Mixed Polarity Multiple Controlled Toffoli (MPMCT) gate in a quantum circuit and a quantum circuit designed using the method. The method includes dividing a process of decomposing an MPMCT gate in a quantum circuit into a front step, a central step, and a back step, selecting one of multiple decomposition methods in consideration of the sub-MCT gate assigned to each of the steps and the number (k) of work qubits of which the initial states are known (Clean Work Qubits (CWQs)), and decomposing the MPMCT gate into gates of a Clifford+T set, which is a standard fault-tolerant gate set, by applying the selected decomposition method.

公开(公告)号：US20250036995A1

公开(公告)日：2025-01-30

申请号：US18604596

申请日：2024-03-14

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Jong-Heon LEE

IPC: G06N10/40 ,  G06N10/20

Abstract: Disclosed herein are a method for quantum circuit design for a SHA3-256 hash function algorithm and a quantum circuit designed using the method. The method includes inputting respective index values of five types of function blocks constituting the SHA3-256 hash function algorithm to data qubits, forming a chi function quantum circuit, among the five types of function blocks, using a Mixed Polarity Toffoli (MPT) gate, and designing a SHA3-256 quantum circuit based on an in-place version of a quantum circuit for each of the five types of function blocks, including the chi function quantum circuit.

公开(公告)号：US20240403679A1

公开(公告)日：2024-12-05

申请号：US18403884

申请日：2024-01-04

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Jong-Heon LEE

IPC: G06N10/20 ,  G06F30/30

Abstract: Disclosed herein is a method for quantum circuit design for Toffoli-depth reduction. The method includes generating an in-place version of an input quantum circuit having a minimized Toffoli-count based on reversible function blocks forming a quantum circuit, detecting permutations corresponding to respective mixed polarity Toffoli gates included in the input quantum circuit, searching for a pair of gates capable of being processed in parallel, among the mixed polarity Toffoli gates, based on the permutations, and generating an output quantum circuit, the Toffoli-depth of which is reduced compared to the input quantum circuit, by changing the positions of the mixed polarity Toffoli gates such that the pair of gates is processed in parallel based on work qubits.