公开(公告)号：US09519305B2

公开(公告)日：2016-12-13

申请号：US14294146

申请日：2014-06-03

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： Andrew Wolfe ,  Thomas Conte

IPC: G06F1/04 ,  G06F11/34 ,  G06F1/08 ,  G06F9/48

CPC classification number: G06F1/04 ,  G06F1/08 ,  G06F9/4881 ,  G06F11/34

Abstract: Techniques described herein generally relate to multi-core processors including two or more processor cores. Example embodiments may set forth devices, methods, and computer programs related to calculating a clock rate for one or more of the processor cores in the multi-core processor. One example method may include determining a first estimated workload for a first processor core and a second estimated workload for a second processor core within a scheduling interval in a periodic scheduling environment. In addition, a first clock rate for the first processor core may be calculated based on one or more of the first estimated workload, a maximum clock rate supported by the multi-core processor and/or the scheduling interval. Similarly, a second clock rate for the second processor core may also be calculated based on one or more of the second estimated workload, the maximum clock rate, and/or the scheduling interval.

Abstract translation: 本文描述的技术通常涉及包括两个或更多个处理器核心的多核处理器。 示例性实施例可以阐述与计算多核处理器中的一个或多个处理器核心的时钟速率有关的设备，方法和计算机程序。 一个示例性方法可以包括在周期性调度环境中在调度间隔内确定第一处理器核心的第一估计工作量和第二处理器核心的第二估计工作负载。 此外，可以基于第一估计工作负载，由多核处理器支持的最大时钟速率和/或调度间隔中的一个或多个来计算第一处理器核心的第一时钟速率。 类似地，也可以基于第二估计工作负载，最大时钟速率和/或调度间隔中的一个或多个来计算第二处理器核心的第二时钟速率。