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公开(公告)号：US10261534B2
公开(公告)日：2019-04-16
申请号：US14947612
申请日：2015-11-20
发明人： Joseph Nabicht , Branislav Petrovic
摘要： Methods and systems for a low-dropout regulator may comprise a voltage regulator comprising: (a) a pass transistor having a first terminal at a control gate, a voltage input at a second terminal, and a voltage output at a third terminal, and (b) an adaptive control circuit (ACC), electrically coupled to a reference voltage and each of the terminals of the pass transistor. The ACC may determine a ΔV between the second and third terminals and cause an error signal to be applied to the first terminal to keep ΔV essentially constant as the voltage input varies. The ACC may include a voltage summing circuit electrically coupled to the reference voltage and the input voltage to generate a comparison value. An error amplifier electrically coupled to the control gate and to the voltage summing circuit may generate the error signal from the comparison value and the output voltage.
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公开(公告)号：US20160085252A1
公开(公告)日：2016-03-24
申请号：US14947612
申请日：2015-11-20
发明人： Joseph Nabicht , Branislav Petrovic
IPC分类号： G05F1/575
摘要： Methods and systems for a low-dropout regulator may comprise a voltage regulator comprising: (a) a pass transistor having a first terminal at a control gate, a voltage input at a second terminal, and a voltage output at a third terminal, and (b) an adaptive control circuit (ACC), electrically coupled to a reference voltage and each of the terminals of the pass transistor. The ACC may determine a AV between the second and third terminals and cause an error signal to be applied to the first terminal to keep AV essentially constant as the voltage input varies. The ACC may include a voltage summing circuit electrically coupled to the reference voltage and the input voltage to generate a comparison value. An error amplifier electrically coupled to the control gate and to the voltage summing circuit may generate the error signal from the comparison value and the output voltage.
摘要翻译： 用于低压差稳压器的方法和系统可以包括电压调节器，其包括：（a）在控制栅极具有第一端子的通过晶体管，在第二端子处输入的电压以及在第三端子处的电压输出，以及（ b）自适应控制电路（ACC），电耦合到参考电压和传输晶体管的每个端子。 ACC可以确定第二和第三终端之间的AV，并且使得将错误信号施加到第一终端以使AV基本上恒定，因为电压输入变化。 ACC可以包括电耦合到参考电压和输入电压的电压求和电路以产生比较值。 电耦合到控制栅极和电压求和电路的误差放大器可以根据比较值和输出电压产生误差信号。
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公开(公告)号：US09484807B2
公开(公告)日：2016-11-01
申请号：US13952308
申请日：2013-07-26
发明人： Branislav Petrovic , Joseph Nabicht
CPC分类号： H02M3/07 , H02M3/1588 , H02M2001/0045 , H02M2001/007 , Y02B70/1466
摘要： A high efficiency switched capacitor voltage regulator circuit and a method of efficiently generating an enhanced voltage from an input voltage supply. An input voltage Vin from a main power source is the base voltage to be pumped to an enhanced voltage. Auxiliary voltage sources V1 and V2 are from sources (or grounds) available in the system. During phase 1 of a clock signal, a pump capacitor is charged to ΔV=V2−V1. During phase 2 of the clock signal, the pump capacitor is connected in series between Vin and an output capacitor, resulting in the sum voltage V=Vin+ΔV being generated across the output capacitor.
摘要翻译： 高效开关电容器电压调节器电路以及从输入电压源有效地产生增强的电压的方法。 来自主电源的输入电压Vin是要被泵送到增强电压的基极电压。 辅助电压源V1和V2来自系统中可用的源（或接地）。 在时钟信号的阶段1期间，泵电容器被充电到ΔV= V2-V1。 在时钟信号的阶段2期间，泵浦电容器串联连接在Vin和输出电容器之间，导致在输出电容器两端产生的和电压V = Vin +ΔV。
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公开(公告)号：US09201436B2
公开(公告)日：2015-12-01
申请号：US13947521
申请日：2013-07-22
发明人： Branislav Petrovic , Joseph Nabicht
摘要： An adaptive low dropout voltage regulator (LDO) circuit having low power dissipation, and a method of regulating voltage while maintaining low power dissipation. Power dissipation in an LDO circuit is controlled and held to a low value using an LDO circuit that maintains a constant voltage difference between Vin and Vout; that is, ΔV=Vin−Vout is approximately constant rather than linearly variable as a function of Vin. The output voltage Vout essentially tracks the input voltage Vin with an offset equal to ΔV; Vout increases as Vin, but is kept between minimum and maximum voltage output specification limits.
摘要翻译： 具有低功耗的自适应低压降稳压器（LDO）电路，以及在保持低功耗的同时调节电压的方法。 使用保持Vin和Vout之间恒定电压差的LDO电路来控制LDO电路中的功耗并保持低电平; 也就是说，＆Dgr; V = Vin-Vout近似恒定，而不是作为Vin的函数的线性变量。 输出电压Vout基本上跟踪具有等于＆Dgr; V的偏移的输入电压Vin; Vout随Vin增加，但保持在最小和最大电压输出规格限制之间。
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