公开(公告)号：US20240192714A1

公开(公告)日：2024-06-13

申请号：US18079837

申请日：2022-12-12

Applicant: Faraday Technology Corp.

Inventor： Sivaramakrishnan Subramanian ,  Hussainvali Shaik ,  Eswar Reddi

IPC: G05F1/565 ,  G05F1/575

CPC classification number: G05F1/565 ,  G05F1/575

Abstract: A voltage regulator provides a regulated voltage to a double data rate (DDR) Physical Interface (PHY) including a plurality of delay elements. The voltage regulator includes: an amplifier, for receiving a voltage at a first input terminal and generating an output voltage; a first MOSFET coupled to a supply voltage and a second input terminal of the amplifier; a second MOSFET coupled in parallel with the first MOSFET for generating a first current in response to a first enable signal; a load, coupled to the first MOSFET and the second MOSFET, for generating the regulated voltage; and a load capacitor, coupled in parallel with the load. The first enable signal is generated by inputting a gate enable signal for a delay element of the plurality of delay elements into a delay circuit corresponding to the delay element.