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公开(公告)号:US20210028067A1
公开(公告)日:2021-01-28
申请号:US16517827
申请日:2019-07-22
Applicant: GLOBALFOUNDRIES INC.
Inventor: Daniel J. Jaeger , Naved A. Siddiqui , Shimpei Yamaguchi , Shreesh Narasimha
IPC: H01L21/8234 , H01L21/768 , H01L27/088 , H01L29/66 , H01L29/78
Abstract: A method includes forming a gate cut opening by removing a sacrificial material from a portion of a dummy gate in a first dielectric over a substrate. The gate cut opening includes a lower portion in which the sacrificial material was located and an upper portion extending laterally over the first dielectric. Filling the gate cut opening with a second dielectric creates a gate cut isolation. Recessing the second dielectric creates a cap opening in the second dielectric; and filling the cap opening with a third dielectric creates a dielectric cap. The third dielectric is different than the second dielectric, e.g., oxide versus nitride, allowing forming of an interconnect in at least a portion of the third dielectric without the second, harder dielectric acting as an etch stop.