-
公开(公告)号:US20170338345A1
公开(公告)日:2017-11-23
申请号:US15160099
申请日:2016-05-20
Applicant: GLOBALFOUNDRIES INC.
Inventor: Alexander REZNICEK , Shogo MOCHIZUKI , Veeraraghavan S. BASKER , Nicolas L. BREIL , Oleg GLUSCHENKOV
IPC: H01L29/78 , H01L29/66 , H01L29/165
CPC classification number: H01L29/7848 , H01L29/165 , H01L29/66795 , H01L29/785
Abstract: Fabrication method for a semiconductor device and structure are provided, which includes: providing an isolation layer at least partially disposed adjacent to at least one sidewall of a fin structure extended above a substrate structure, the fin structure including a channel region; recessing an exposed portion of the fin structure to define a residual stress to be induced into the channel region of the fin structure, wherein upper surfaces of a recessed fin portion and the isolation layer are coplanar with each other; and epitaxially growing a semiconductor material from the recessed exposed portion of the fin structure to form at least one of a source region and a drain region of the semiconductor device.
-
公开(公告)号:US20180175197A1
公开(公告)日:2018-06-21
申请号:US15884045
申请日:2018-01-30
Applicant: GLOBALFOUNDRIES INC.
Inventor: Alexander REZNICEK , Shogo MOCHIZUKI , Veeraraghavan S. BASKER , Nicolas L. BREIL , Oleg GLUSCHENKOV
IPC: H01L29/78 , H01L29/165 , H01L29/66
CPC classification number: H01L29/7848 , H01L29/165 , H01L29/66795 , H01L29/785
Abstract: Fabrication method for a semiconductor device and structure are provided, which includes: providing an isolation layer at least partially disposed adjacent to at least one sidewall of a fin structure extended above a substrate structure, the fin structure including a channel region; recessing an exposed portion of the fin structure to define a residual stress to be induced into the channel region of the fin structure, wherein upper surfaces of a recessed fin portion and the isolation layer are coplanar with each other; and epitaxially growing a semiconductor material from the recessed exposed portion of the fin structure to form at least one of a source region and a drain region of the semiconductor device.
-