公开(公告)号：US20190318955A1

公开(公告)日：2019-10-17

申请号：US15950907

申请日：2018-04-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jin WALLNER ,  Katherina BABICH ,  Sunil Kumar SINGH

IPC: H01L21/762 ,  H01L29/66 ,  H01L29/06

Abstract: A method of forming an SDB that is self-aligned to a dummy gate and the resulting device are provided. Embodiments include providing a plurality of gates over a SOI layer above a BOX layer, each gate having a pair of sidewall spacers and a cap layer, and a raised S/D epitaxial regions over the SOI layer between each gate; removing a gate of the plurality of gates and a portion of the SOI layer exposed by the removing of the gate, and a portion of the BOX layer underneath the SOI layer, the removing forms a trench; forming a liner of a first dielectric material over and along sidewalls of the trench; and filling the trench with a second dielectric material.