公开(公告)号：US20200066593A1

公开(公告)日：2020-02-27

申请号：US16109258

申请日：2018-08-22

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Tek Po Rinus LEE ,  Annie LEVESQUE ,  Qun GAO ,  Hui ZANG ,  Rishikesh KRISHNAN ,  Bharat KRISHNAN ,  Curtis DURFEE

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/78 ,  H01L23/532 ,  H01L23/535 ,  H01L21/02 ,  H01L29/40

Abstract: A device including a triple-layer EPI stack including SiGe, Ge, and Si, respectively, with Ga confined therein, and method of production thereof. Embodiments include an EPI stack including a SiGe layer, a Ge layer, and a Si layer over a plurality of fins, the EPI stack positioned between and over a portion of sidewall spacers, wherein the Si layer is a top layer capping the Ge layer, and wherein the Ge layer is a middle layer capping the SiGe layer underneath; and a Ga layer in a portion of the Ge layer between the SiGe layer and the Si layer.

公开(公告)号：US20200051867A1

公开(公告)日：2020-02-13

申请号：US16058494

申请日：2018-08-08

Applicant: GLOBALFOUNDRIES INC.

Inventor： Fuad H. AL-AMOODY ,  Yiheng XU ,  Rishikesh KRISHNAN

IPC: H01L21/8234

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to fin structures and methods of manufacture. The structure includes: a plurality of fin structures formed of substrate material; a semiconductor material located between selected fin structures of the plurality of fin structures; and isolation regions within spaces between the plurality of fin structures.