公开(公告)号：US20160141242A1

公开(公告)日：2016-05-19

申请号：US15001390

申请日：2016-01-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ryan Kim ,  Jason R. Cantone ,  Wenhui Wang

IPC: H01L23/528 ,  H01L27/11 ,  H01L23/522

CPC classification number: H01L23/528 ,  H01L21/743 ,  H01L21/76816 ,  H01L21/76897 ,  H01L21/823475 ,  H01L21/823481 ,  H01L23/5226 ,  H01L27/0207 ,  H01L27/11 ,  H01L27/1104 ,  H01L27/1116 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A methodology for forming contact areas by a multiple patterning process that provides increased yield and lower risk of contact-to-contact short at points of tight tip-to-tip spacing and the resulting device are disclosed. Embodiments include forming one or more trench patterning layers on a planarized surface of a wafer, forming one or more trenches in the one or more trench patterning layers, forming a block mask at one or more points along the one or more trenches, extending the one or more trenches down to a substrate level of the wafer, and removing the block mask from the one or more points.

Abstract translation: 公开了一种用于通过多重图案化工艺形成接触面积的方法，其提供增加的产量并且在紧密的尖端到尖端间距的点处产生接触 - 接触短的风险以及所得到的装置。 实施例包括在晶片的平坦化表面上形成一个或多个沟槽图案化层，在一个或多个沟槽图案化层中形成一个或多个沟槽，在沿一个或多个沟槽的一个或多个点处形成阻挡掩模， 或更多的沟槽直到晶片的衬底水平，以及从一个或多个点移除阻挡掩模。

公开(公告)号：US09275889B2

公开(公告)日：2016-03-01

申请号：US14045340

申请日：2013-10-03

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ryan Kim ,  Jason R. Cantone ,  Wenhui Wang

IPC: H01L21/4763 ,  H01L21/74 ,  H01L27/11 ,  H01L21/8234 ,  H01L27/02

CPC classification number: H01L23/528 ,  H01L21/743 ,  H01L21/823475 ,  H01L21/823481 ,  H01L23/5226 ,  H01L27/0207 ,  H01L27/11 ,  H01L27/1104 ,  H01L27/1116 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A methodology for forming contact areas by a multiple patterning process that provides increased yield and lower risk of contact-to-contact short at points of tight tip-to-tip spacing and the resulting device are disclosed. Embodiments include forming one or more trench patterning layers on a planarized surface of a wafer, forming one or more trenches in the one or more trench patterning layers, forming a block mask at one or more points along the one or more trenches, extending the one or more trenches down to a substrate level of the wafer, and removing the block mask from the one or more points.

Abstract translation: 公开了一种用于通过多重图案化工艺形成接触面积的方法，其提供增加的产量并且在紧密的尖端到尖端间距的点处产生接触 - 接触短的风险以及所得到的装置。 实施例包括在晶片的平坦化表面上形成一个或多个沟槽图案化层，在一个或多个沟槽图案化层中形成一个或多个沟槽，在沿一个或多个沟槽的一个或多个点处形成阻挡掩模， 或更多的沟槽直到晶片的衬底水平，以及从一个或多个点移除阻挡掩模。