公开(公告)号：US20130111142A1

公开(公告)日：2013-05-02

申请号：US13719626

申请日：2012-12-19

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wei ZHENG ,  Jiangen LIU ,  Gang LIU ,  Weiguang CAI

IPC: G06F12/08

CPC classification number: G06F12/084 ,  G06F12/0806 ,  G06F12/0811 ,  G06F2212/1012

Abstract: Embodiments of the present invention disclose a method for accessing a cache and a pseudo cache agent (PCA). The method of the present invention is applied to a multiprocessor system, where the system includes at least one NC, at least one PCA conforming to a processor micro-architecture level interconnect protocol is embedded in the NC, the PCA is connected to at least one PCA storage device, and the PCA storage device stores data shared among memories in the multiprocessor system. The method of the present invention includes: if the NC receives a data request, obtaining, by the PCA, target data required in the data request from the PCA storage device connected to the PCA; and sending the target data to a sender of the data request. Embodiments of the present invention are mainly applied to a process of accessing cache data in the multiprocessor system.

Abstract translation: 本发明的实施例公开了一种用于访问高速缓存和伪高速缓存代理（PCA）的方法。 本发明的方法应用于多处理器系统，其中系统包括至少一个NC，至少一个符合处理器微架构级互连协议的PCA嵌入在NC中，PCA连接到至少一个 PCA存储装置，PCA存储装置将存储在多处理器系统中的数据共享。 本发明的方法包括：如果NC接收到数据请求，则由PCA从连接到PCA的PCA存储设备获得数据请求中所需的目标数据; 并将目标数据发送到数据请求的发送者。 本发明的实施例主要应用于在多处理器系统中访问高速缓存数据的过程。

公开(公告)号：US20130073814A1

公开(公告)日：2013-03-21

申请号：US13675713

申请日：2012-11-13

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Haibin WANG ,  Jiangen LIU ,  Jie ZHANG

IPC: G06F12/00

CPC classification number: G06F15/173 ,  G06F15/17362

Abstract: A computer system, comprising a plurality of nodes, the plurality of nodes are grouped into m node groups, each node group comprises n nodes, wherein m is a natural number greater than or equal to 1, n is a natural number greater than or equal to 2, the n nodes in each of the node group are connected directly or indirectly into a dual interconnection structure, wherein first node controllers of the n nodes in the same node group are connected directly or indirectly to form a first interconnection structure, second node controllers of nodes in the same node group are connected directly or indirectly to form a second interconnection structure. Therefore, less interconnection chips are required, the access path between nodes is shortened, the access delay time is reduced, the cost is reduced, and the system performance is improved.

Abstract translation: 一种包括多个节点的计算机系统，所述多个节点被分组为m个节点组，每个节点组包括n个节点，其中m是大于或等于1的自然数，n是大于或等于的自然数 到2，每个节点组中的n个节点直接或间接连接到双互连结构中，其中同一节点组中的n个节点的第一节点控制器直接或间接连接以形成第一互连结构，第二节点 同一节点组中节点的控制器直接或间接连接以形成第二互连结构。 因此，需要较少的互连芯片，节点之间的接入路径缩短，接入延迟时间缩短，成本降低，系统性能提高。

公开(公告)号：US20130067197A1

公开(公告)日：2013-03-14

申请号：US13670718

申请日：2012-11-07

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jiangen LIU ,  Chenghong HE ,  Haibin WANG ,  Xinyu HOU

IPC: G06F15/76

CPC classification number: G06F15/80 ,  G06F13/4221 ,  G06F15/167 ,  G06F15/17337

Abstract: The present invention provides a computer subsystem and a computer system. The computer subsystem includes L composite nodes, each composite node includes M basic nodes, each basic node includes N central processing units CPUs and one node controller NC, where any two CPUs in each basic node are interconnected, each CPU in each basic node is connected to the NC in the basic node, the NC in each basic node has a routing function, any two NCs in the M basic nodes are interconnected, and a connection between the L composite nodes formed through a connection between NCs enable communication between any two NCs to require at most three hops. The computer subsystem and the computer system according to embodiments of the present invention can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

Abstract translation: 本发明提供一种计算机子系统和计算机系统。 计算机子系统包括L个复合节点，每个复合节点包括M个基本节点，每个基本节点包括N个中央处理单元CPU和一个节点控制器NC，其中每个基本节点中的任何两个CPU互连，每个基本节点中的每个CPU都连接 在基本节点中的NC中，每个基本节点中的NC具有路由功能，M个基本节点中的任何两个NC互连，并且通过NC之间的连接形成的L个复合节点之间的连接使得任何两个NC之间的通信 要求最多三跳。 根据本发明的实施例的计算机子系统和计算机系统可以减少互连芯片的种类和数量，并且简化系统的互连结构，从而提高系统的可靠性。