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公开(公告)号:US10361090B2
公开(公告)日:2019-07-23
申请号:US15120720
申请日:2014-09-24
Applicant: INTEL CORPORATION
Inventor: Kimin Jun , Patrick Morrow , Donald Nelson
IPC: H01L21/308 , H01L29/66 , H01L29/78 , H01L21/768 , H01L29/06
Abstract: A grid comprising a first set of grid lines and a second set of grid lines is formed on a substrate using a first lithography process. At least one of the first set of grid lines and the second set of grid lines are selectively patterned to define a vertical device feature using a second lithography process.