公开(公告)号：US09954516B1

公开(公告)日：2018-04-24

申请号：US14830698

申请日：2015-08-19

Applicant: Integrated Device Technology, Inc.

Inventor： Hui Li ,  Teck Chuan Ng

IPC: H03K3/03 ,  H03L7/099 ,  H03B5/32

CPC classification number: H03L7/099 ,  G06F1/04 ,  H03L7/16

Abstract: A timing device that includes an OTP NVM, a first periodic signal generator operable to generate a periodic signal having a first frequency, a second periodic signal generator operable to generate a periodic signal having a frequency that is lower than the first frequency, and selection logic. In a first operating mode, the selection logic is configured to output the first periodic signal at an output terminal as long as a crystal clock feedback signal is received at the input terminal and output the second periodic signal when the crystal clock feedback signal is not received at the input terminal. In a second operating mode, the selection logic is configured to output the first periodic signal as long as a output enable signal is received at the input terminal and not provide any output at the output terminal when the output enable signal is not received at the input terminal.