公开(公告)号：US20200162230A1

公开(公告)日：2020-05-21

申请号：US16601611

申请日：2019-10-15

Applicant: Intel Corporation

Inventor： Boaz Kol ,  Noam Tal ,  Shaul Shulman ,  Thushara Hewavithana

IPC: H04L5/14 ,  H04B3/21 ,  H04L27/00 ,  H04L27/148

Abstract: A cable modem supporting full duplex (FDX) operations. The cable modem includes a transmit circuitry configured to process a transmit signal and a receive circuitry configured to process a receive signal. The receive circuitry includes a switchable analog filter configured to filter the receive signal. The switchable analog filter is configurable for different passband frequencies. The receive circuitry also includes a digital compensation filter configured to compensate a difference in frequency response in a specific frequency band due to switching of the switchable analog filter for a different passband frequency. The cable modem also includes an adjacent channel interference (ACI) cancellation filter and an adjacent leakage interference (ALI) cancellation filter. A digital compensation filter is also used in processing the ACI cancellation signal and the ALI cancellation signal to impose or compensate the difference in frequency response due to the switchable analog filter switching.

公开(公告)号：US20190044555A1

公开(公告)日：2019-02-07

申请号：US15978213

申请日：2018-05-14

Applicant: Intel Corporation

Inventor： Thushara Hewavithana ,  Shaul Shulman ,  Noam Tal ,  Boaz Kol ,  Nathan Goichberg ,  David Barr

IPC: H04B1/04 ,  H04B3/20 ,  H04L27/26 ,  H04L5/14

Abstract: A method and apparatus for cancelling self-interference in a cable network implementing full duplex (FDX). A processor in a cable modem may obtain a frequency response of an echo channel for at least one sub-channel in an FDX band and calculate filter coefficients based on the frequency response, and an interference canceller cancels the self-interference in the downstream signal. The interference canceller includes filters in a digital domain to generate an interference cancellation signal from a reference signal. In another example, the processor may obtain frequency responses of an echo channel for all sub-channels in a FDX band, combine the frequency responses for the FDX band, and generate a channel impulse response for the FDX band from the combined frequency response. The interference canceller may then cancel the self-interference in the downstream signal in an analog domain based on the channel impulse response.

公开(公告)号：US11546578B2

公开(公告)日：2023-01-03

申请号：US16976082

申请日：2019-05-06

Applicant: Intel Corporation

Inventor： Walter Bschor ,  Thushara Hewavithana ,  Boaz Kol

IPC: H04N17/04 ,  H04N21/61 ,  H04L5/14 ,  H04N21/442

Abstract: A method and apparatus for controlling a gain of an amplifier of a cable modem operating in a full duplex (FDX) mode. A cable modem includes an amplifier configured to amplify a received signal, a power meter configured to measure a power of the received signal on a plurality of channels, and a control unit configured to estimate a maximum expected power to receive on the plurality of channels based on the measured power and set a gain of the amplifier based on the maximum expected power. The cable modem is configured to operate in a full duplex mode. The channels include a full duplex upstream channel, a full duplex downstream channel, and a legacy downstream channel. The maximum expected power may be estimated via a sounding procedure. A power spectral density may be measured and the maximum expected power may be derived from the power spectral density.

公开(公告)号：US20200244505A1

公开(公告)日：2020-07-30

申请号：US16774349

申请日：2020-01-28

Applicant: Intel Corporation

Inventor： Thushara Hewavithana ,  Noam Tal ,  Boaz Kol ,  Murti Devarakonda

IPC: H04L27/26 ,  H04L27/00 ,  H04L27/38

Abstract: A modem circuit associated with a communication system is disclosed. The modem circuit comprises a symbol tracking circuit configured to track a symbol timing associated with a downstream (DS) channel associated with the modem circuit, in accordance with a timing offset estimate. In some embodiments, the timing offset estimate comprises a unified timing offset derived based on one or more external channels associated with the modem circuit that is different from the DS channel. The symbol tracking circuit is further configured to apply a sample rate correction to a DS signal associated with the DS channel, based on the timing offset estimate comprising the unified timing offset, and apply a frequency correction to the DS signal, based on a frequency offset estimate comprising a unified frequency offset derived based on the one or more external channels.