公开(公告)号：US10257529B2

公开(公告)日：2019-04-09

申请号：US14319437

申请日：2014-06-30

Applicant: INTEL CORPORATION

Inventor： Changwon D. Rhee ,  Kin-Hang Cheung ,  Sang-Hee Lee ,  Zhijun Lei ,  Dmitry E. Ryzhov ,  Xinglei Zhu

IPC: H04N19/176 ,  H04N19/436

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for dividing a frame comprising pixels into a number of macroblocks, each macroblock comprising a number of pixels within four macroblock boundaries. Various embodiments may also include creating at least two regions having a plurality of macroblocks by dividing the frame along macroblock boundaries and generating wave front groups based on the macroblocks in each region, each wave front group from each region comprising one or more macroblocks to process in parallel.

公开(公告)号：US20180293097A1

公开(公告)日：2018-10-11

申请号：US15482912

申请日：2017-04-10

Applicant: Intel Corporation

Inventor： Changwon D. Rhee ,  Zhijun R. Lei ,  Ping Liu ,  Kin-Hang W. Cheung ,  Gomathi Ramamurthy ,  Naiqian Lu ,  Sang-Hee Lee ,  Wei Xiong ,  Richard Gui Xie ,  Saimanohara S. Alapati ,  Jay M. Patel

IPC: G06F9/48

Abstract: In some embodiments, independent workloads may be grouped together into a single super workload. This super workload is dispatched to a single context hardware system that does not run an operating system. This effectively creates a multi-context system out of a single context hardware processor.

公开(公告)号：US11150943B2

公开(公告)日：2021-10-19

申请号：US15482912

申请日：2017-04-10

Applicant: Intel Corporation

Inventor： Changwon D. Rhee ,  Zhijun R. Lei ,  Ping Liu ,  Kin-Hang W. Cheung ,  Gomathi Ramamurthy ,  Naiqian Lu ,  Sang-Hee Lee ,  Wei Xiong ,  Richard Gui Xie ,  Saimanohara S. Alapati ,  Jay M. Patel

IPC: G06F9/48 ,  G06F9/50 ,  G06F9/46 ,  G06T1/20 ,  G09G5/36

Abstract: Independent workloads may be grouped together into a single super workload. This super workload is dispatched to a single context hardware system that does not run an operating system. This effectively creates a multi-context system out of a single context hardware processor.