BIAS-LESS TECHNIQUE FOR DESIGN OF A DIGITAL LINEAR VOLTAGE REGULATOR

    公开(公告)号:US20240329677A1

    公开(公告)日:2024-10-03

    申请号:US18192440

    申请日:2023-03-29

    CPC classification number: G05F1/575 G05F1/565 G05F1/59

    Abstract: Embodiments herein relate to a Digital Linear Voltage Regulator (DLVR). The DLVR includes a set of power links which each includes many columns of power transistors. The columns can be turned on or off individually based on digital data from a main control circuit. Additionally, individual power links can be turned on or off based on monitoring of a dropout voltage of the set of power links and a drain-to-source resistance, Rds_on, of replica columns. An input voltage may be monitored as an alternative. The monitoring compensates for changes in Rds_on due to changes in an input voltage, Vin, which could otherwise result in unstable behavior. The DLVR can avoid the complexity and power losses of dynamic biasing of the control gate voltages of the transistors.

    DLVR-SUPPLIED LOGIC DOMAIN OPERATIONAL VOLTAGE OPTIMIZATION

    公开(公告)号:US20230205242A1

    公开(公告)日:2023-06-29

    申请号:US17561054

    申请日:2021-12-23

    CPC classification number: G05F1/563 G05F1/561

    Abstract: A supply voltage may be set using a local voltage regulator, such as a Digital Linear Voltage Regulators (DLVR). A DLVR may include a compensator, and the performance of the compensator may be affected by a dropout (DO) voltage. To improve the performance of a compensator, a number of compensator calculations may be pre-calculated to reduce the complexity of remaining real-time computations and enable compensator calculations to be completed within a single DLVR clock cycle. A DLVR may include a sense filter, and the DLVR transfer function (TF) may be modified using dynamic shaping of open loop gain and pole locations of a sense filter. The DO range associated with the DLVR TF may be changed according to a monitored DO(t) to reduce the sensitivity of a domain VMIN on dropout, which reduces power consumption, increases performance, and enables simplification of test flows.

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