公开(公告)号：US20230297538A1

公开(公告)日：2023-09-21

申请号：US18017077

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Long Jiang ,  Xu Zhang ,  Hong Cheng

IPC: G06F15/80 ,  G06F17/16

CPC classification number: G06F15/8092 ,  G06F17/16

Abstract: Programmable spatial array processing circuitry may be programmable to perform multiple different types of matrix decompositions. The programmable spatial array processing circuitry may include an array of processing elements. When programmed with a first instructions, the array performs a first type of matrix decomposition. When programmed with second instructions, the array performs a second type of matrix decomposition. Individual processing elements of the programmable spatial array processing circuitry may avoid having individual instruction memories. Instead, there may be an instruction memory that provides a portion of the first instructions or a portion of the second instructions sequentially to one processing element of a row of processing elements to sequentially propagate to other processing elements of the row of processing elements.

公开(公告)号：US12235793B2

公开(公告)日：2025-02-25

申请号：US18017077

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Long Jiang ,  Xu Zhang ,  Hong Cheng

IPC: G06F15/80 ,  G06F17/16

Abstract: Programmable spatial array processing circuitry may be programmable to perform multiple different types of matrix decompositions. The programmable spatial array processing circuitry may include an array of processing elements. When programmed with a first instructions, the array performs a first type of matrix decomposition. When programmed with second instructions, the array performs a second type of matrix decomposition. Individual processing elements of the programmable spatial array processing circuitry may avoid having individual instruction memories. Instead, there may be an instruction memory that provides a portion of the first instructions or a portion of the second instructions sequentially to one processing element of a row of processing elements to sequentially propagate to other processing elements of the row of processing elements.