公开(公告)号：US20190042248A1

公开(公告)日：2019-02-07

申请号：US15941526

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Dennis Ryan BRADFORD ,  Jesus CORBAL ,  Brian HICKMANN ,  Rohan SHARMA

IPC: G06F9/30 ,  G06F9/38

Abstract: Disclosed embodiments relate to a method and apparatus for efficient matrix transpose. In one example, a processor to execute a matrix transpose instruction includes fetch circuitry to fetch the matrix transpose instruction specifying a destination matrix and a source matrix having (N×M) elements and (M×N) elements, respectively, a (N×M) load buffer, decode circuitry to decode the fetched matrix transpose instruction, and execution circuitry, responsive to the decoded matrix transpose instruction to, for each row X of M rows of the specified source matrix: fetch and buffer N elements of the row in a load register, and cause the N buffered elements to be written, in the same relative order as in the row, to column X of M columns of the load buffer, and the execution circuitry subsequently to write each of N rows of the load buffer to a same row of the load buffer.