公开(公告)号：US20190273693A1

公开(公告)日：2019-09-05

申请号：US16415023

申请日：2019-05-17

Applicant: Intel Corporation

Inventor： Manasi Deval ,  Gregory J. Bowers ,  Ryan E. Hall

IPC: H04L12/801

Abstract: Technologies for pacing network packet transmissions include a computing device. The computing device includes a compute engine and a network interface controller (NIC). The NIC is to select a first transmit descriptor from a window of transmit descriptors. The first transmit descriptor is associated with a packet stream. The NIC is also to identify a node of a plurality of nodes of a hierarchical scheduler. The node is associated with the selected first transmit descriptor. The NIC is also to determine whether the identified node has a target amount of transmission credits available and transmit, in response to a determination that the identified node has a target amount of transmission credits available, the network packet associated with the first transmit descriptor to a target computing device.

公开(公告)号：US11201829B2

公开(公告)日：2021-12-14

申请号：US16415023

申请日：2019-05-17

Applicant: Intel Corporation

Inventor： Manasi Deval ,  Gregory J. Bowers ,  Ryan E. Hall

IPC: H04L12/801

Abstract: Technologies for pacing network packet transmissions include a computing device. The computing device includes a compute engine and a network interface controller (NIC). The NIC is to select a first transmit descriptor from a window of transmit descriptors. The first transmit descriptor is associated with a packet stream. The NIC is also to identify a node of a plurality of nodes of a hierarchical scheduler. The node is associated with the selected first transmit descriptor. The NIC is also to determine whether the identified node has a target amount of transmission credits available and transmit, in response to a determination that the identified node has a target amount of transmission credits available, the network packet associated with the first transmit descriptor to a target computing device.