公开(公告)号：US20180024761A1

公开(公告)日：2018-01-25

申请号：US15706521

申请日：2017-09-15

Applicant: Intel Corporation

Inventor： Pascal A. MEINERZHAGEN ,  Stephen T. KIM ,  Anupama A. THAPLOO ,  Muhammad M. KHELLAH

IPC: G06F3/06 ,  G11C5/14

CPC classification number: G11C5/148

Abstract: An apparatus is provided which comprises: a first power gate transistor coupled to an ungated power supply node and a gated power supply node, the first power gate transistor having a gate terminal controllable by a first logic; and a second power gate coupled to the ungated power supply node and the gated power supply node, the second power gate transistor having a gate terminal controllable by a second logic, wherein the first power gate transistor is larger than the second power gate transistor, and wherein the second logic is operable to: weakly turn on the second power gate, fully turn on the second power gate, turn off the second power gate, and connecting the second power gate as diode.