公开(公告)号：US10698432B2

公开(公告)日：2020-06-30

申请号：US13801777

申请日：2013-03-13

Applicant: Intel Corporation

Inventor： Yi-Chun Shih ,  Kaushik Mazumdar ,  Stephen T. Kim ,  Rinkle Jain ,  James W. Tschanz ,  Muhammad M. Khellah

IPC: G05F1/00 ,  G05F1/46 ,  H02M3/156 ,  G05F1/563

Abstract: Described is an apparatus which comprises: a plurality of transistors coupled to an input power supply and to a load; a first comparator with a first node coupled to the load, and a second node coupled to a first reference; a second comparator with a first node coupled to the load, and a second node coupled to a second reference, the second reference being different from the first reference; and a logic unit to receive output of the first comparator and output of the second comparator, the logic unit to turn on or off transistors of the plurality of transistors according to outputs of the first and second comparators.

公开(公告)号：US11921529B2

公开(公告)日：2024-03-05

申请号：US16914174

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Yi-Chun Shih ,  Kaushik Mazumdar ,  Stephen T. Kim ,  Rinkle Jain ,  James W. Tschanz ,  Muhammad M. Khellah

IPC: G05F1/46 ,  G05F1/56 ,  G05F1/563 ,  H02M3/15 ,  G05F1/00 ,  H02M3/156

CPC classification number: G05F1/563 ,  G05F1/46 ,  G05F1/00 ,  H02M3/156

Abstract: Described is an apparatus which comprises: a plurality of transistors coupled to an input power supply and to a load; a first comparator with a first node coupled to the load, and a second node coupled to a first reference; a second comparator with a first node coupled to the load, and a second node coupled to a second reference, the second reference being different from the first reference; and a logic unit to receive output of the first comparator and output of the second comparator, the logic unit to turn on or off transistors of the plurality of transistors according to outputs of the first and second comparators.

公开(公告)号：US20160231761A1

公开(公告)日：2016-08-11

申请号：US15133177

申请日：2016-04-19

Applicant: Intel Corporation

Inventor： Rinkle Jain ,  Yi-Chun Shih ,  Vaibhav Vaidya

IPC: G05F1/56

CPC classification number: G05F1/56 ,  G05F1/565

Abstract: Described is an apparatus comprising: an output stage having an input supply node to receive an input power supply and an output node to provide an output supply to a load; an amplifier to control current strength of the output stage according to the output supply and a reference voltage; and a hysteresis unit to monitor the output supply and operable to control the current strength of the output stage according to a voltage level of the output supply. Described is another apparatus which comprises: a plurality of charge pumps to adjust current strength of the output stage; and a logic unit to monitor the output supply and operable to control the plurality of charge pumps according to a voltage level of the output supply and one or more reference voltages.

Abstract translation: 描述了一种装置，包括：输出级，其具有用于接收输入电源的输入电源节点和向负载提供输出电源的输出节点; 放大器，用于根据输出电源和参考电压来控制输出级的电流强度; 以及滞后单元，用于监视输出电源并且可操作以根据输出电源的电压电平来控制输出级的电流强度。 描述了另一种装置，其包括：多个电荷泵，用于调节输出级的电流强度; 以及逻辑单元，用于监视输出电源并可操作以根据输出电源的电压电平和一个或多个参考电压来控制多个电荷泵。