公开(公告)号：US09692714B1

公开(公告)日：2017-06-27

申请号：US14570433

申请日：2014-12-15

Applicant: Juniper Networks, Inc.

Inventor： Vijit V. Nair ,  Sek Wing Siu ,  Raghuraman Thirumalairajan ,  Sunil Mekad

IPC: H04L12/50 ,  H04L12/947 ,  H04L12/933

CPC classification number: H04L49/25 ,  H04L49/101

Abstract: A system may include a set of 4N packet processors and a switching fabric to interconnect the set of 4N packet processors. The switching fabric may include the following switching elements having a size of at least 3N×3N: a first switching element, a second switching element, a third switching element, and a fourth switching element. The first switching element may be directly connected to the second switching element and the third switching element, and may be indirectly connected to the fourth switching element. The second switching element may be directly connected to the fourth switching element, and may be indirectly connected to the third switching element. The third switching element may be directly connected to the fourth switching element.

公开(公告)号：US10257001B1

公开(公告)日：2019-04-09

申请号：US15469078

申请日：2017-03-24

Applicant: Juniper Networks, Inc.

Inventor： Sek Wing Siu ,  Raghuraman Thirumalairajan ,  Vijit V. Nair

IPC: H04L12/66 ,  H04L25/03 ,  H04L12/911

Abstract: A switch interface board may include a first serializer/deserializer to communicate with a first group of packet processing components of a first chassis via a first port. The first chassis may house the switch interface board and the first group of packet processing components. The switch interface board may include a second serializer/deserializer to communicate with a second switch interface board of the first chassis via a second port. The second switch interface board may be connected to a second group of packet processing components of the first chassis. The second group of packet processing components may be different from the first group of packet processing components. The switch interface board may include a third port to communicate with a third switch interface board of a second chassis or a switching device of a cross-connect chassis.

公开(公告)号：US09594716B1

公开(公告)日：2017-03-14

申请号：US13932677

申请日：2013-07-01

Applicant: Juniper Networks, Inc.

Inventor： Vijit V. Nair ,  Franklin D. Boyden ,  Nathan J. Berg ,  Satish Dattatray Deo ,  Akhil Kumar Agrawal

IPC: G06F13/40

CPC classification number: G06F13/4068

Abstract: Techniques are described for an electronic device in which a communication plane having a plurality of slots for receiving communication cards further includes an interface for receiving a pluggable module that operates to relay signals within the communication plane. The electronic device includes a plurality of removable communication cards and a communication plane having slots for receiving the plurality of removable communication cards. The electronic device also includes the pluggable module that is removably coupled to and external from the communication plane. The pluggable module receives a signal from a transmitting communication card from off of the communication plane, compensates for loss experienced by the signal or loss that will be experienced by the signal, and transmits the compensated signal back onto the communication plane and to a receiving communication card.

Abstract translation: 描述了一种用于电子设备的技术，其中具有用于接收通信卡的多个时隙的通信平面还包括用于接收操作以中继通信平面内的信号的可插拔模块的接口。 电子设备包括多个可移动通信卡和具有用于接收多个可移动通信卡的插槽的通信平面。 电子设备还包括可拆卸地耦合到通信平面并且从通信平面外部的可插拔模块。 可插拔模块从通信平面接收来自发送通信卡的信号，补偿由信号经历的信号或丢失所经历的损失，并且将经补偿的信号发送回通信平面和接收通信 卡。

公开(公告)号：US10291551B2

公开(公告)日：2019-05-14

申请号：US15632956

申请日：2017-06-26

Applicant: Juniper Networks, Inc.

Inventor： Vijit V. Nair ,  Sek Wing Siu ,  Raghuraman Thirumalairajan ,  Sunil Mekad

IPC: H04L12/947 ,  H04L12/933

Abstract: A system may include a set of 4N packet processors and a switching fabric to interconnect the set of 4N packet processors. The switching fabric may include the following switching elements having a size of at least 3N×3N: a first switching element, a second switching element, a third switching element, and a fourth switching element. The first switching element may be directly connected to the second switching element and the third switching element, and may be indirectly connected to the fourth switching element. The second switching element may be directly connected to the fourth switching element, and may be indirectly connected to the third switching element. The third switching element may be directly connected to the fourth switching element.

公开(公告)号：US20170346763A1

公开(公告)日：2017-11-30

申请号：US15632956

申请日：2017-06-26

Applicant: Juniper Networks, Inc.

Inventor： Vijit V. Nair ,  Sek Wing SIU ,  Raghuraman THIRUMALAIRAJAN ,  Sunil MEKAD

IPC: H04L12/947 ,  H04L12/933

CPC classification number: H04L49/25 ,  H04L49/101

Abstract: A system may include a set of 4N packet processors and a switching fabric to interconnect the set of 4N packet processors. The switching fabric may include the following switching elements having a size of at least 3N×3N: a first switching element, a second switching element, a third switching element, and a fourth switching element. The first switching element may be directly connected to the second switching element and the third switching element, and may be indirectly connected to the fourth switching element. The second switching element may be directly connected to the fourth switching element, and may be indirectly connected to the third switching element. The third switching element may be directly connected to the fourth switching element.