公开(公告)号：US11551620B2

公开(公告)日：2023-01-10

申请号：US17553406

申请日：2021-12-16

Applicant: LG Display Co., Ltd.

Inventor： Seongho Yun ,  Dongmyoung Kim

IPC: G09G3/3266 ,  G09G3/3258

Abstract: A gate driver circuit can include a plurality of stage circuits, in which each of the plurality of stage circuits supplies a gate signal to gate lines arranged in a display panel, and includes an M node, a Q1 node, a Q2 node, a QB node, a line selector, a Q1 node controller, a Q1 node stabilizer, an inverter, a QB node stabilizer, a carry signal output circuit portion, and a gate signal output circuit portion, in which a first low-potential voltage level, a third low-potential voltage level, and a fourth low-potential voltage level for operating the gate driver circuit are set to different values, and the gate driver circuit can have a reduced size and better prevent leakage current while also providing more stable gate signals.

公开(公告)号：US12283249B2

公开(公告)日：2025-04-22

申请号：US18593260

申请日：2024-03-01

Applicant: LG Display Co., Ltd.

Inventor： Dongmyoung Kim ,  HongJae Shin ,  YongHo Kim

IPC: G09G3/32 ,  G09G3/3266 ,  H10K59/121

Abstract: A display device and a gate driving panel circuit including the same are discussed. The gate driving panel circuit in an example includes an output buffer block configured to receive a clock signal and output a scan signal, and a logic block configured to control respective voltages of a Q node and a QB node electrically connected to the output buffer block. The output buffer block includes a pull-up transistor disposed between a clock node to which the clock signal is input and an output node to which the scan signal is output, and a pull-down transistor disposed between a gate low voltage node to which a gate low voltage is applied and the output node. A gate node of the pull-up transistor is electrically connected to the Q node.